Test circuit having selective by pass arrangement for test data

Details Test circuit having selective by pass arrangement for test data Test circuit having selective by pass arrangement for test data

1988-04-13

1990-01-30

Smith, Jerry

Excavating

371 27, G01R 3128

Patent

active

048978370

ABSTRACT:
The test pattern signal inputted from an input terminal is set at a corresponding circuit portion by shifting each shift register for prescribed times. Meanwhile, when a circuit portion of a certain circuit block only is to be tested, the test pattern signal from the input terminal is selected by a selected circuit and is directly applied to the shift register corresponding to that circuit block. Consequently, the test pattern signal is directly applied to the shift register corresponding to the circuit block without being passed through the shift registers on the way, so that the setting of the test pattern signal can be carried out quickly, enabling speedy testing.

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Glasser, Lance A. et al.:The Design and Analysis of VlSI Circuits, Addison-Wesley Publishing Co., pp. 36-37.
Tusi, Frank F.: LSI/VLSI Testability Design, McGraw Hill Book Company, 1987, pp. 102-113.

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