Test circuit for VSLI integrated circuits

Electricity: measuring and testing – Plural – automatically sequential tests

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371 15, G01R 3102

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active

047527293

ABSTRACT:
A test circuit for a VLSI integrated circuit includes interface test circuits (20) which are disposed between a logic circuit (16) an output terminal (14). The interface circuits (20) are each operable to provide a transparent interface between logic circuit (16) and output terminals (14) or force a high logic state on the output, a low logic state on the output or a floating state. A test code circuit (22) is operable to receive two logic signals from pins (24) and (26) external to the IC and determine the state of the test interface circuit (20) such that all test interface circuits (20) operate simultaneously in the same mode.

REFERENCES:
patent: 4503387 (1985-03-01), Rutledge et al.
"Four-State Driver for Memory Testing", by Abodeer, IBM Tech. Disc. Bull., vol. 23, No. 8, 1/81, pp. 3605-3607.
"Diagnostic Testing and I/O Identification", by Dwire et al., IBM Tech. Disc. Bull., vol. 22, No. 11, 4/80, pp. 4801-4802.

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