Test circuit for delay measurements on a LSI chip

Details Test circuit for delay measurements on a LSI chip Test circuit for delay measurements on a LSI chip

1980-12-17

1983-07-05

Grimm, Siegfried H.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

Frequency of cyclic current or voltage

324 73R, 331 46, 331 57, 331DIG3, 340653, G01R 1702, G01R 2902, G01R 3128

Patent

active

043921051

ABSTRACT:
A test circuit that is particularly suitable for inclusion on an LSI chip when testing a new technology. The circuit will enable accurate determination of the turn-on and turn-off delays of a logic circuit on the chip. Two related feedback loops are provided, one of the loops containing the circuit being tested. The differences in time duration between related portions of the two loops correspond to the turn-on and turn-off delays of the circuit being tested.

Affiliated with

Also associated with

Rating

Test circuit for delay measurements on a LSI chip does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Test circuit for delay measurements on a LSI chip, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Test circuit for delay measurements on a LSI chip will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1442303