Test circuit arrangement for a communication network and test me

Details Test circuit arrangement for a communication network and test me Test circuit arrangement for a communication network and test me

1987-10-21

1989-11-14

Fleming, Michael R.

Excavating

371 251, G05F 1102

Patent

active

048812293

ABSTRACT:
A built-in test-signal generator (TG) and a built-in error-detection circuit (PE) independent of the test-signal generator are provided in a novel circuit arrangement. In response to an external stimulus, a signal path can be opened at a given point, and the signal from the test-signal generator (TG) can be injected. The signal taken from another, likewise externally selectable point of the signal path is checked in the error-detection circuit (PE); the result is fed out. Such a circuit arrangement is used to advantage where many like circuit arrangements are united in a broadband switching network consisting of a plurality of broadband switching modules. Since the test-signal generators and the error-detection circuits are independent of each other, systems tests can be performed without having to form any additional testing paths. Such a circuit arrangement also facilitates the testing of large-scale-integrated circuits already on the wafer, because no high-frequency test signals have to be applied and taken off.

REFERENCES:
patent: 4538269 (1985-08-01), Briscoe
patent: 4654851 (1987-03-01), Busby
patent: 4669081 (1987-05-01), Mathews
patent: 4672610 (1987-06-01), Salick
patent: 4686628 (1987-08-01), Lee
patent: 4754215 (1988-06-01), Kawai

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