Test circuit and method

Details Test circuit and method Test circuit and method

1988-12-12

1990-11-27

Eisenzopf, Reinhard J.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324158T, 307474, 371 221, G01R 3100, G01R 3102

Patent

active

049739042

ABSTRACT:
A test circuit for the output buffer of an integrated circuit permits testing for faults in the electrical connection of the output buffer to external conductors on a printed circuit board and for faults in the output buffer itself. A tester device supplies two test control signals to the test circuit for causing the output of the output buffer to be forced high, to be forced low, to pass the logic level of the internal data signal provided to the input of the output buffer, or to go into a tri-state (high impedance) condition.

REFERENCES:
patent: 4490673 (1984-12-01), Blum et al.
patent: 4495628 (1985-01-01), Zasio
patent: 4503387 (1985-03-01), Rutledge et al.
patent: 4544882 (1985-10-01), Flora
patent: 4546472 (1985-10-01), Volk et al.
patent: 4587480 (1986-05-01), Zasio
patent: 4612499 (1986-09-01), Andersen et al.
patent: 4631474 (1986-12-01), Dolland
patent: 4631724 (1986-12-01), Shimizu
patent: 4644265 (1987-02-01), Davidson et al.
patent: 4674089 (1987-06-01), Poret et al.
patent: 4698588 (1987-10-01), Hwang et al.
patent: 4701920 (1987-10-01), Resnick et al.
patent: 4701922 (1987-10-01), Kuboki et al.
patent: 4782283 (1988-11-01), Zasio
patent: 4833395 (1989-05-01), Sasaki et al.

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