Test board de-embedding method to improve RF measurements...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S754090, C324S765010, C324S1540PB

Reexamination Certificate

active

06815964

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a test board de-embedding method to improve RF measurements accuracy on an automatic testing equipment for IC wafers.
More specifically, the invention relates to a test board de-embedding method to improve RF measurements accuracy on an automatic testing equipment for IC wafers, wherein each wafer includes a device under test located on a wafer die plane and being contacted by probecard needles of a probecard that is coupled to a configuration board through a probe interface board.
2. Description of the Related Art
As is well known in this specific technical field, there is a great need to calibrate an automatic test equipment (ATE) and to de-embed the test boards at wafer level. This is particularly difficult because the connection between a RF tester instrumentation of the ATE and the integrated device or circuit to be tested on the wafer is not direct.
For this reason, the RF measurements are often inaccurate because of the values measured on the bench and the related correlation operations with the bench.
We will also refer hereinafter to the ATE with the brief appellation of “tester”.
The IC wafer, in fact, is contacted by a board known as “probecard” that contains the needles ring for the contact. The probecard is coupled to a configuration board through a probe interface board (PIB).
The probecard and the PIB depend on the particular device under test (DUT) while the configuration board doesn't depend on the DUT. Normally, the configuration board is a front end board that allows to setup the ATE in a plurality of configurations or options.
As clearly shown in
FIG. 2
, the tester includes two microwave ports that are connected to the PIB (Probe In Board) through the configuration board that depends on the particular configuration of the tester.
When an automatic calibration routine is invoked, or a user command “calibrate-uwport” is selected, the RF calibration is performed and the calibration plane is set at an internal plane, inside the ATE.
This means that, in order to have calibrated measurements at the wafer die level, there is a need to extend the calibration plane from the “Internal Plane” to the “Wafer Die Plane”. Those planes are clearly shown in FIG.
2
.
However, up to now no wafer calibration standards have been provided to allow this kind of calibration. In other words, according to the prior art it is not possible to transfer the calibration plane up to the wafer level.
Typically, at present, two known procedures are used, depending on the environment in which the device under test (DUT) has to be tested.
A first procedure is used in the production environment and implements the following steps:
1. Calibration up to the Configuration-Board Plane;
2. Scalar correction factors evaluation from bench correlation.
A second procedure is used in the development environment and implements the following steps:
1. Calibration up to the Configuration-Board Plane;
2. De-embedding of PIB using coaxial OSP Calibration Standards;
3. Scalar correction factors evaluation from bench correlation.
Both these procedures are affected of the following problems:
the measurement accuracy on ATE is strongly dependent on the bench accuracy;
all the errors, made during the correlation operation, are transferred to the correction factors evaluation;
correction factors depend on the status of the test boards and then they have to be periodically upgraded;
correction factors depend on the status of the tester and then they have to be upgraded each time maintenance actions have made on the tester.
Moreover, the bench correlation action is characterized, normally, by a too big cycle-time:
T≧20 days
The aim of the present invention is to provide a technique for calibrating an Automatic Test Equipment (ATE) and for de-embedding the test-boards at wafer level.
A further aim of the present invention is to provide a simple way to design and perform a calibration standards on wafer, in particular for a device under test (DUT).
BRIEF SUMMARY OF THE INVENTION
According to one embodiment of the invention a tester calibration and de-embedding method is provided to improve RF measurements accuracy on an automatic testing equipment for IC wafers by implementing a test board de-embedding phase, wherein each wafer includes a device under test located on a wafer die plane and being contacted by probecard needles of a probecard that is coupled to a configuration board through a probe interface board, the method including the following phases:
performing an automatic calibration phase of said testing equipment up to an internal plane located inside said automatic testing equipment;
performing a calibration plane transfer up to a plane of said configuration board using a predetermined number of calibration standard loads realized on said wafer;
performing a test boards de-embedding phase up to the wafer die plane.
This approach is suitable either in development and production environment and, as will be explained, it avoids performing any correlation actions.
The features and advantages of a method and tester according to the invention will be apparent from the following description of an embodiment thereof, given by way of non-limiting example with reference to the accompanying drawings.


REFERENCES:
patent: 6002426 (1999-12-01), Back et al.
patent: 6154041 (2000-11-01), Cheng
patent: 6445172 (2002-09-01), Park et al.

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