Test apparatus, timing generator and program therefor

Data processing: measuring – calibrating – or testing – Testing system

Reexamination Certificate

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C702S108000, C702S117000, C702S182000, C324S500000, C324S537000, C324S538000, C324S701000, C073S001420, C714S736000, C340S146200

Reexamination Certificate

active

11222681

ABSTRACT:
There is provided a test apparatus including a PLL circuit for generating a strobe signal of which the timing is shifted according to a given delay control voltage, a variable delay circuit being provided divergently from a path connecting the PLL circuit and the timing comparator and delaying the strobe signal according to the predetermined phase difference of the strobe signal for the output signal, and a first phase comparing unit for comparing a phase of the strobe signal output from the variable delay circuit and a phase of the output signal output from the device under test and supplying the delay control voltage according to the phase difference to the PLL circuit.

REFERENCES:
patent: 5231314 (1993-07-01), Andrews
patent: 5659553 (1997-08-01), Suzuki
patent: 6011732 (2000-01-01), Harrison et al.
patent: 2004/0122620 (2004-06-01), Doi et al.
Jayabalan et al., ‘PLL Based Based High Speed Functional Testing’, 2003, IEEE Publication, ATS'03, pp. 1-4.
Arai, ‘A High-Resolution Time Digitizer Utilizing Dual PLL Circuits’, 2004, IEEE Publication, pp. 969-973.

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