Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1998-09-17
2003-05-27
Metjahic, Safet (Department: 2171)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
Reexamination Certificate
active
06570393
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to improved test apparatus, in particular to an improvement in a connector utilized in automatic semiconductor testing.
2. Background of the Invention
Delay time in semiconductor testing is an important parameter because of the corresponding reduction in throughput. In typical semiconductor device testers the contact terminals of the tester are maintained at zero electrical potential, i.e. grounded/power-off, when contact is made with the device. This approach eliminates the possibility of applying excessive voltages to the voltage sensitive devices. Unfortunately this approach requires that power must be established and stabilized before testing may commence. This can result in a test delay of tens or even hundreds of milliseconds.
This time delay parameter could be eliminated if an electrically hot make-break contact between the tester and the device under test could be made safely with no injury to the device under test.
SUMMARY OF THE INVENTION
The present invention is an improved semiconductor test connector with different extending contact distances. In the operation of the test apparatus, the test contacts and the Device Under Test (DUT) are brought together at an essentially constant speed along a path generally perpendicular to the contact extensions. The extending contacts are arranged such that they can be deflected inwardly toward the tester by the force applied by a DUT. This results in the contact with the greatest extension connecting first and contacts with smaller extensions making later contact with elements of the DUT. The relative time delays for each contact is essentially proportional to their relative extension with the contacts having the greatest extension making contact first.
The contact with the greatest extension, which makes the first contact with the DUT, is normally grounded to eliminate the possibility of excessive voltages being applied to the semiconductor under test. Electrical hot power or signal connections are made after the ground connection. The result is that electrically hot make-break contacts may be safely made to a DUT with no time delays required to establish test voltage levels.
REFERENCES:
patent: 5362241 (1994-11-01), Matsuoka et al.
patent: 5872458 (1999-02-01), Boardman et al.
JohnsTech International Corporation
LeRoux Etienne P
Metjahic Safet
Nawrocki, Rooney & Sivertson P.A.
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