Test apparatus and test method

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

Reexamination Certificate

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Details

C702S119000, C714S739000, C714S742000

Reexamination Certificate

active

08060333

ABSTRACT:
Provided is a test apparatus that tests a device under test, including a pattern list storage section that stores a plurality of pattern lists that each designate, in a prescribed order, the test patterns to be output by the device under test, and a pattern list processing section that (i) sequentially outputs the test patterns by sequentially executing the pattern lists according to test results of the device under test and, (ii) when transitioning from a current pattern list to a subsequent pattern list, repeatedly outputs a prescribed idle pattern until execution of the subsequent pattern list is begun.

REFERENCES:
patent: 6587983 (2003-07-01), Nakayama
patent: 7284177 (2007-10-01), Hollander et al.
patent: 2006/0190794 (2006-08-01), Murata
patent: 2000-98007 (2000-04-01), None
patent: 2000-292495 (2000-10-01), None
patent: 2006-058251 (2006-03-01), None
Evans, “The New ATE: Protocol Aware”, Test Conference, 2007. ITC 2007. IEEE International, Oct. 21-26, 2007, pp. 1-10, Santa Clara, CA.
The explanation of circumstances concerning the accelerated examination dated Sep. 1, 2010, in a counterpart Japanese patent application JP2010-195529 submitted to Japanese Patent Office.
The explanation of circumstances concerning the accelerated examination dated Sep. 1, 2010, for a counterpart Japanese patent application JP2010-195529 submitted to Japanese Patent Office.

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