Test apparatus

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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Reexamination Certificate

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08082118

ABSTRACT:
Provided is a test apparatus that tests a device under test, comprising a clock recovering section that recovers a clock signal from an output signal output by the device under test; an acquiring section that acquires the output signal at a timing corresponding to the clock signal; an adjusting section that adjusts a phase difference between the clock signal and the output signal received by the acquiring section, according to an adjustment amount supplied thereto; a setting memory that stores an adjustment amount of the phase difference between the clock signal and the output signal in the acquiring section in association with each of a plurality of test conditions; and a setting section that supplies the adjusting section with an adjustment amount associated with a test condition for testing the device under test, based on the adjustment amounts stored in the setting memory.

REFERENCES:
patent: 7549099 (2009-06-01), Kantake
patent: 2007/0006031 (2007-01-01), Kantake
patent: 2007/0061094 (2007-03-01), Ochi et al.
patent: 2008/0018345 (2008-01-01), Chiba et al.
patent: 2005-285160 (2005-10-01), None
patent: 2006-337099 (2006-12-01), None
patent: 2007-017257 (2007-01-01), None
International Search Report (ISR) for PCT/JP2007/058985 for Examiner consideration, citing Foreign Patent Document Nos. 1-2 listed above.
Written Option (PCT/ISA/237) of PCT/JP2007/058985.

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