Test and diagnosis of associated output logic for products havin

Details Test and diagnosis of associated output logic for products havin Test and diagnosis of associated output logic for products havin

1994-12-07

1995-08-15

Nguyen, Hoa T.

Excavating

371 221, 371 224, G01R 3128, G01R 1512

Patent

active

054426405

ABSTRACT:
This invention addresses the testing and diagnosis of failures in the post-logic of products having embedded arrays. The post-logic is the combinational logic that is fed by the embedded array. Since there is no direct access to the post-logic (no direct controllability) it requires special handling. The testing method comprises initializing the array to random values; choosing an address from the array; reading out the information from that address, while applying random signals at the primary inputs. This process is continued for a predetermined number of cycles, while holding that address and applying different random signals at the primary inputs. The process is then repeated while choosing different addresses from the array. Fault diagnosis is accomplished by means of a notebook that retains the past history of the addresses chosen from the array.

REFERENCES:
patent: 3961252 (1976-06-01), Eichelberger
patent: 3961254 (1976-06-01), Cavaliere et al.
patent: 4404519 (1983-09-01), Westcott
patent: 4608669 (1986-08-01), Klara et al.
patent: 4872168 (1989-10-01), Aadsen et al.
patent: 5173906 (1992-12-01), Dreibelbis et al.

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