Ternary signal multiplexor circuit

Details Ternary signal multiplexor circuit Ternary signal multiplexor circuit

1987-09-23

1989-03-21

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307242, 375 36, 355 58, 328104, 328154, H03K 1756, H04L 516

Patent

active

048146340

ABSTRACT:
The multiplexing circuit disclosed herein combines multiple input signals into a common output by allowing ternary signals to pass from multiple input circuits to a common output circuit. The circuit combines ternary signals with minimum feedback between input circuits. The circuit is passive, has minimum attenuation, and a small number of components.

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Hippert et al., "Transmission line multiplexor ", IBM Technical Disclosure Bulletin, vol. 14, No. 7, Dec. 1971, pp. 2110-2111.
Grimes, "Ternary CMOS Logic Device," IBM Technical Disclosure Bulletin, vol. 17, No. 4, Sep. 1974, pp. 1145-1146.

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