Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2002-12-31
2004-06-08
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S692000, C257S700000
Reexamination Certificate
active
06747349
ABSTRACT:
BACKGROUND OF THE INVENTION
a. Field of the Invention
The present invention pertains to wiring within integrated circuits and specifically to power distribution circuits within integrated circuits.
b. Description of the Background
An integrated circuit (IC) typically includes two or more layers dedicated to power distribution. The power distribution layers may have various arrangements for grossly transmitting current throughout the IC to the various cells that require power.
Various power distribution meshes are known in the art. Examples are U.S. Pat. No. 6,346,721 entitled “Integrated Circuit Having Radially Varying Power Bus Grid Architecture” by Schultz, U.S. Pat. No. 6,111,310 entitled “Radially Increasing Core Power Bus Grid Architecture” by Schultz, copending and commonly assigned U.S. patent application Ser. No. 09/948,190 entitled “Power Redistribution Bus for a Wire Bonded Integrated Circuit” by Schultz, et al., filed Sep. 7, 2001, copending and commonly assigned U.S. patent application Ser. No. 09/968,286 entitled “Die Power Distribution Bus” by Ali, et al, filed Oct. 1, 2001, all of which are hereby specifically incorporated herein by reference for all they disclose and teach.
In general, these distribution meshes address the transmittal of current to the inside portions of a die. However, there is need in the art for an improved termination ring that provides the distributed current to the periphery of the mesh.
One type of IC is known as an Application Specific Integrated Circuit (ASIC). The design of ASICs comprises many pre-designed circuits that are connected to create the necessary logic and circuitry for the specific task. One type of pre-designed circuit is an I/O circuit. The I/O circuit is the circuitry that is close to the bonding pad. Recent designs have increased the size of the I/O circuits, known as ‘tall I/O’, referring to the length of the rectangular shape of the I/O circuits.
In older ASIC designs, it had been commonplace to place a termination ring for a power distribution mesh inside of the I/O circuits for a number of reasons. However, as the size of some of the I/O circuits has grown, it has become impractical to adhere to this design rule. As such, rectilinear termination rings have been designed to avoid the tall I/O circuits by changing shape to meander around the tall I/O. These types of termination rings may occupy more space on the die than necessary and thus may cause the die to be larger to accommodate the larger termination ring. Further, as the I/O circuits become taller, the termination ring is placed further inward, causing a longer distance for the power to travel from a bonding pad to the termination ring. The increased distance causes the trace or strap from the bonding pad to the termination ring to become wider and may increase the number of bonding pads required for transmitting sufficient current to the termination ring. In some cases, the number of bonding pads required for the specific application may determine the size of the die. In such cases, increases in the number of bonding pads may increase the die size, adding to the cost of the resultant IC.
The design convention has been that I/O circuits have been placed in lower metal layers of the IC. Further, the traces from the bonding pads to the termination ring have been commonly incorporated into special I/O circuits known as power I/O. The traces or straps that transfer the current from the outside of the die to the termination ring within the die require vias to transfer the current between layers. The size and depth of the vias necessarily take up space within the die that is otherwise useable.
It would therefore be advantageous to provide a system and method for a power termination ring in an integrated circuit that requires a minimum of space on the periphery of the die. It would further be advantageous to provide a termination ring that accommodated tall I/O circuits as well as occupied a minimum amount of space within and integrated circuit so that additional circuitry may be placed in an IC without increasing the size of the IC.
SUMMARY OF THE INVENTION
The present invention overcomes the disadvantages and limitations of the prior art by providing a system and method for placing a termination ring and straps in the top two layers of an integrated circuit. The termination ring may be placed over I/O circuits so that the distance between a bonding pad and the termination ring is minimized. Further, the termination ring architecture is adapted to L-shaped power distribution meshes as well as other power distribution meshes.
The present invention may therefore comprise a power distribution system for an integrated circuit die comprising: a first electrically conductive ring about the periphery of the die wherein the first ring is located above at least one I/O circuit; a second electrically conductive ring substantially inwardly offset from the first ring and positioned on the layer below the layer of the first ring; a first connection from the first ring to a first bonding pad wherein at least a continuous electrical connection is located in the same layer as the first ring; and a second connection from the second ring to a second bonding pad wherein at least a continuous electrical connection is located in the same layer as the second ring.
The present invention may further comprise an integrated circuit with a power distribution system comprising: a first electrically conductive ring about the periphery of the die of the integrated circuit wherein the first ring is located above at least one I/O circuit; a second electrically conductive ring substantially inwardly offset from the first ring and positioned on the layer below the layer of the first ring; a first connection from the first ring to a first bonding pad wherein at least a continuous electrical connection is located in the same layer as the first ring; and a second connection from the second ring to a second bonding pad wherein at least a continuous electrical connection is located in the same layer as the second ring.
The present invention may further comprise an integrated circuit with a power distribution system comprising: a first electrically conductive power distribution means about the periphery of the die of the integrated circuit wherein the first electrically conductive power distribution means is located above at least one I/O circuit; a second electrically conductive power distribution means substantially inwardly offset from the first electrically conductive power distribution means and positioned on the layer below the layer of the first electrically conductive power distribution means; a first connection means from the first electrically conductive power distribution means to a first off-die connection means wherein at least a continuous electrical connection is maintained in the same layer as the first electrically conductive power distribution means; and a second connection means from the second electrically conductive power distribution means to a second off-die connection means wherein at least a continuous electrical connection is maintained in the same layer as the second electrically conductive power distribution means.
The advantages of the present invention are that a minimum of space within an integrated circuit is used to transfer current from the bonding pads to a power distribution mesh. Certain critical spaces, such as the area around the periphery of the integrated circuit die and the area from the bonding pads to the termination ring are minimized so that the size of the die may be minimized and additional circuitry may be placed in the integrated circuit.
REFERENCES:
patent: 5311058 (1994-05-01), Smolley
patent: 5723899 (1998-03-01), Shin
patent: 5723908 (1998-03-01), Fuchida et al.
patent: 5886917 (1999-03-01), Yasukawa et al.
patent: 6111310 (2000-08-01), Schultz
patent: 6194768 (2001-02-01), Gardner et al.
patent: 6346721 (2002-02-01), Schultz
patent: 6476497 (2002-11-01), Waldron et al.
patent: 6545348 (2003-04-01), Takano
Al-Dabagh Maad
Antisseril Thomas
Ratchkov Radoslav
Shen Bo
Subbarao Prasad
Potter Roy
The Law Offices of William W. Cochran, LLC
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