Telecommunications – Transmitter and receiver at same station
Reexamination Certificate
1999-05-26
2003-03-04
Legree, Tracy (Department: 2681)
Telecommunications
Transmitter and receiver at same station
C710S262000, C710S264000, C710S260000
Reexamination Certificate
active
06529711
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a terminal for wireless communication, particularly to reduction of noise during the reception of data through a wireless network.
2. Description of Related Art
With regard to a terminal for wireless communication incorporating digital parts such as a microprocessor to control a section for wireless communication, noise developed in those digital parts may adversely affect the operation of the section for wireless communication. Conventional techniques to avoid such adverse effects inflicted by noise consist of, for example, shielding an interface between the section for wireless communication and the digital parts, or of arresting all activities except the reception of data during the reception of data which is particularly sensitive to noise. On the other hand, recently, improvement of the processing activity of a terminal for wireless communication is required, and microprocessors operating at a high speed come to be used. Thus, development of noise is all the more problematic. The major factor leading to the development of noise is access to an external memory.
A technique whereby opportunities for the access to an external memory are reduced to thereby lessen the development of noise is disclosed in Japanese Patent Laid-Open No. 5-158821. According to the technique disclosed in this publication, an internal cache memory is introduced in a chip representing a microprocessor, and connection of the microprocessor with an external element is put to an inactive state if a function is called for that requires arrest of noises, and necessary processing is achieved solely depending on programs and data stored in the internal cache memory. The same publication calls such action mode as “single chip mode” or “single mode”, and another action mode in which access to an external memory is permitted as “expanded mode”. During operation depending on the single chip mode, access to an external memory is arrested, and thus the development of noise is greatly reduced.
However, according to the technique disclosed in the above publication, it is necessary for part of an internal cache memory to have a dedicated RAM and ROM. Although currently general-purpose microprocessors containing an internal cache memory are available in the market, such a microprocessor has a function to automatically load commands or data into an internal cache memory and thus may alter on its own accord the data stored in the internal cache memory at the time when it makes an access to an external memory. To prevent such alteration of data, according to the technique disclosed in the publication, introduction of a RAM and ROM usable only during single chip mode becomes essential. Introduction of such a RAM and ROM would not only limit the memory capacity of cache memory usable during expanded action mode, to thereby lower the processing speed, but also increase the production cost of the chip.
SUMMARY OF THE INVENTION
This invention aims at providing a terminal for wireless communication which is free from all the problems described above, and is capable of suppressing the development of noise during operations sensitive to noise, particularly during reception of data, although it incorporates a general-purpose microprocessor, and a method enabling such operation.
The terminal for wireless communication of this invention comprises a wireless communication section to transmit/receive radio signals, and a microprocessor to control the transmission/reception of radio signals performed by the wireless communication section; the microprocessor comprises a cache memory to store processing programs which are necessary for the operation of the microprocessor, and an interrupt controller to deal with an external request for interrupt; and the interrupt controller, while the microprocessor engages in a certain specific operation solely dependent on processing programs stored in the cache memory without making an access to an external element, for example, engages in the processing of incoming signals, and when it receives a request for interrupt from outside, masks the request whenever it finds that the request is inferior in priority to the above specific operation, and permits the microprocessor to keep on engaging in the same operation without interruption.
Namely, whenever the microprocessor engages in an operation very sensitive to noise, particularly when it engages in the processing of incoming signals, all other requests than urgent one are rejected even when the microprocessor has a surplus capacity for processing. Through this mode of operation, it becomes unnecessary for the microprocessor to get access to an external memory to process a request for interrupt, and for programs necessary for treating incoming signals to be reloaded into the cache memory which would be required if the content of the cache memory were altered as a result of an operation necessary for the treatment of the request for interrupt.
If the system engages in transmission and reception of signals alternately, it is desirable to transmit signals without altering programs necessary for reception of signals in a cache memory. For this purpose, if the cache memory has a sufficient capacity, the programs necessary for transmission of signals may be stored in an area within the cache memory different from the programs necessary for reception of signals. If the cache memory does not have a sufficient capacity, necessary commands may be fetched from an external memory as required.
For necessary commands to be fetched from an external memory as required, processing programs should be stored in a non-cache area of the external memory. If a program is designed in a usual manner, a compiler automatically works not to consume a non-cache area for storage of the program as much as possible because use of non-cache area for storage of a program would result in a reduced processing capacity. With this invention, however, use of a non-cache area is positively tried.
Part of microprocessors commercially available confers a function called cache lock to at least a certain area of cache memory so that a program there may be firmly fixed and resistive to alteration. If the system incorporates such a microprocessor, an area to store programs for a certain specific operation should be preferably locked.
For such a terminal for wireless communication to operate, a processing program to instruct a section for wireless communication to exercise a certain specific operation is loaded into a cache memory within a microprocessor; the microprocessor exercises the specific operation following the program in the cache memory without getting access to an external element; and, when it receives a request for interrupt during the operation, it compares the specific operation and the request for interrupt for priority; and whenever it finds that the request for interrupt is inferior in priority to the specific operation, it masks the request for interrupt, and keeps on exercising the specific operation without needing to getting access to an external element.
REFERENCES:
patent: 5867726 (1999-02-01), Ohsuga et al.
patent: 5944809 (1999-08-01), Olarig et al.
patent: 5983310 (1999-11-01), Adams
patent: 5987556 (1999-11-01), Nakagawa et al.
patent: 59-99553 (1984-06-01), None
patent: 5-28040 (1993-02-01), None
patent: 5-158821 (1993-06-01), None
patent: 8-8817 (1996-01-01), None
Legree Tracy
NEC Corporation
Whitham Curtis & Christofferson, P.C.
LandOfFree
Terminal for wireless communication does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Terminal for wireless communication, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Terminal for wireless communication will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3033481