Temperature-correction network with multiple corrections as for

Details Temperature-correction network with multiple corrections as for Temperature-correction network with multiple corrections as for

1980-08-14

1982-04-13

Beha, Jr., William H.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

307310, 323316, 330289, G05F 320

Patent

active

043250181

ABSTRACT:
A correction network for a bow-shaped temperature characteristic includes a resistor and a semiconductor junction having different temperature coefficients and operated with related potentials thereacross to generate temperature-dependent currents responsive to an input current. That temperature-dependent current is subtractively combined with a reference current of predetermined value so that a corrective current, the magnitude of which is usually substantially zero at a predetermined temperature and is temperature-dependent at either higher and lower temperatures, respectively, is generated. In a particular embodiment, a first such corrective current is applied to a node of an extrapolated band-gap voltage reference circuit to tend to reduce the degree to which the reference potential departs from a desired value at temperatures higher than the predetermined temperature. A second corrective current is applied to the same or a different node thereof to tend to reduce the degree to which the reference potential departs from the desired value at temperatures lower than the predetermined temperature.

REFERENCES:
patent: 3809929 (1974-05-01), Vittoz
patent: 3886435 (1975-05-01), Steckler
patent: 3893018 (1975-07-01), Marley
patent: 4172992 (1979-10-01), Culmer et al.
patent: 4176308 (1979-11-01), Dobkin et al.
patent: 4243948 (1981-01-01), Schade
patent: 4249122 (1981-02-01), Widlar
patent: 4250445 (1981-02-01), Brokaw
Gray & Meyer, Analysis and Design of Analog Integrated Circuits, Section A4.3.2, "Band-Gap Reference Biasing CKT", pp. 254-261, 1977.
Vande Piassche, Digest of Technical Papers, 1976, IEEE Int. Solid-State Circuits Conference, Session XIII, THPM 13.3, pp. 148-149, 240.

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