Temperature compensation for semiconductor logic gates

Details Temperature compensation for semiconductor logic gates Temperature compensation for semiconductor logic gates

1986-07-21

1988-07-26

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307450, 307443, 307310, 307304, H03K 19094, H03K 3353, H03K 326, H03K 1716

Patent

active

047602880

ABSTRACT:
A temperature compensation system for semiconductor digital or analog circuits where the temperature compensation is accomplished by two depletion mode MESFETs. A first MESFET is adapted to operate as a level shifter in the linear region of operation only in combination with a second MESFET adapted to operate in the saturation region of operation.

REFERENCES:
patent: 4008406 (1977-02-01), Kawagoe
patent: 4300064 (1981-11-01), Eden
patent: 4558235 (1985-12-01), White et al.
patent: 4622476 (1986-11-01), Venkatesh
patent: 4661726 (1987-04-01), Biard
L. W. Atwood, "FET Circuits", vol. 6, No. 9, Feb. 1984.
G. U. Vack, "Simple Temperature-Stable Reference Source", Radio Fernsehen Elektronik, vol. 29, No. 3, 1980.
News Scope, "Schottky-diode FET/Logic Bring VLSI into the Real World", Electronic Design 5, Mar. 1978.
Van Tuyl, "GaAs MESFET Logic with 4-GHz Clock Rate", IEEE Journal of Solid State Circuits, vol. SC12, No. 5, Oct. 1977.

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