Miscellaneous active electrical nonlinear devices – circuits – and – External effect – Temperature
Reexamination Certificate
1998-10-14
2001-07-10
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
External effect
Temperature
C323S312000, C327S538000
Reexamination Certificate
active
06259307
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to improvements in voltage gain stages, and more particularly to improvements in temperature compensated voltage gain stages.
2. Relevant Background
Many applications exist for fast and simple differential pair gain stages, particularly for high speed applications. A typical gain stage
10
is shown in FIG.
1
. The gain stage
10
includes a differential transistor pair that includes NPN transistors
12
and
14
to the respective gates of which a differential input voltage V
IN
is applied. Load resistors
16
and
18
are connected between the respective collectors of transistors
12
and
14
and a supply voltage, V
CC
. The resistors
16
and
18
have a value of R
2
.
The emitters of the transistors
12
and
14
are connected by current sources
20
and
22
, respectively, to a referenced potential, or ground. A pair of resistors, each of value R
1
,
24
and
26
are connected between the emitters of the transistors
12
and
14
. (Two resistors are shown for ease of calculation; of course, a single resistor of value 2R
1
may be substituted therefor.) The circuit output is obtained at the collectors of the transistors
12
and
14
as differential output voltages, V
0
, on output terminals
28
and
30
.
The voltage gain of the circuit is
vo
v
i
=
R
2
V
T
I
T
+
R
1
.
Since V
T
has a positive temperature coefficient, the overall gain of the circuit
10
is temperature dependent. One way that has been proposed to reduce the temperature dependence problem is to use a PTAT tail current source. One characteristic of the PTAT tail current source is that the current I
T
=KV
T
. However, variations in the tail current that may be provided by the PTAT tail current source may change the quiescent collector voltage of the transistors
12
and
14
. As a result, variations in DC voltage drop across the load resistors R
2
can be troublesome if high gain is desirable.
Another way that such voltage gain stages have been temperature compensated is to attempt to provide circuitry to cancel the V
T
/I
T
term in the gain equation set forth above. One way that has been proposed to cancel this term is by providing a cross-coupled circuit
40
, as shown in FIG.
2
. The circuit
40
is constructed similarly to the circuit
10
shown in
FIG. 1
, with corresponding parts similarly numbered, except that a pair of additional bipolar transistors
32
and
34
are provided. The transistors
32
and
34
are cross coupled, with the base of each being connected to the collector of the other. The cross-quad connectors
32
and
34
provide a transconductance
g
m
=
-
V
T
I
T
term in the denominator of the gain equation. This cancels the g
m
of transistors
12
and
14
.
However, the circuit
40
has several drawbacks. Since the devices are cascaded, head-room is reduced. In addition, the dynamic range is not just limited by currents through the transistors, but is also limited by the transistors
32
and
34
as they are forward biased as the input signal increases differentially. Finally, the reactive component of the input impedance looking into the bases of input transistors
12
and
14
can be negative. Consequently, the circuit can become unstable, if it is not carefully designed.
SUMMARY OF THE INVENTION
In light of the above, therefore, it is an object of the invention to provide an improved temperature compensated voltage gain stage.
It is another object of the invention to provide a temperature compensated voltage gain stage that is suitable for high speed applications.
It is yet another object of the invention to provide a voltage gain stage of the type described that provides sufficient “head room” with regard to the voltage drop across the load resistors of the circuit.
It is yet another object of the invention to provide a voltage gain stage of the type described in which the quiescent voltage of the collectors of the differential transistor pair of the circuit exhibits little variation with temperature.
These and other objects, features and advantages of the invention will be apparent to those skilled in the art from the following detailed description of the invention, when read in conjunction with the accompanying drawings and appended claims.
According to a broad aspect of the invention, a temperature compensated voltage gain stage is provided. The gain stage has a first current path, which includes a first bipolar transistor, a first load resistor, and a first PTAT current source connected in series. It also has a second current path which includes a second bipolar transistor, a second load resistor, and a second PTAT current source connected in series. A third resistor is connected between the first and second current paths. First and second current sources having a negative current to temperature relationship are connected to supply current to respective the first and second current paths in proportion to temperature induced current changes in the first and second current paths. As a consequence, a band-gap voltage is developed across the load resistors, providing for an output from the gain state that is essentially temperature independent.
REFERENCES:
patent: 4220877 (1980-09-01), Giordano
patent: 4282477 (1981-08-01), Ahmed
patent: 5030924 (1991-07-01), Fritz
patent: 5034626 (1991-07-01), Pirez et al.
patent: 5404058 (1995-04-01), Nishijima
patent: 5896063 (1999-04-01), Marsh et al.
patent: 5900772 (1999-05-01), Somerville et al.
patent: 5977760 (1999-11-01), Kimura
patent: 5990727 (1999-11-01), Kimura
patent: 6020786 (2000-02-01), Ashby
Brady W. James
Nguyen Hai L.
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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