Temperature compensated vertical pin probing device

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S758010, C324S760020

Reexamination Certificate

active

06297657

ABSTRACT:

BACKGROUND OF THE INVENTION
Integrated circuits in their wafer state are tested using probing devices, the probes of which are traditionally of cantilevered or vertical configuration. In a known type of vertical pin probing device, the probes are held between spaced upper and lower dies and are generally curved with a straight portion that protrudes substantially perpendicular to the lower die of the housing. As the wafer under test is raised into contact with the probing device, and then overdriven a few thousandths of an inch, the probes recede into the housing, and the curved portion of the probe deflects causing spring force that provides good electrical contact with the integrated circuit pads.
Traditionally, the housing is made from a dielectric material, often a plastic such as Delrin®, trademark of E.I. duPont de Nemours & Co.
When a certain IC (integrated circuit) is tested at two or more temperatures, over a large temperature range, for example 32 degrees F., room temperature, and 275 degrees F., the typical prior art probe housing expands with a significantly higher thermal expansion rate than that of the silicon base material of the IC wafer under test. Such expansion causes a mismatch of the probe locations and the IC pad locations, a condition that not only results in failure to make satisfactory electrical contact, but may result in fatal damage to the IC due to probe penetration in the circuit region of the IC.
One solution to this problem is to dimensionally compensate the room temperature pitch dimensions of probes in the housing so that at the specified test temperature it will have expanded to provide a nearly exact match of probe and pad positions. Except for temperatures within a narrow range, this option requires separate probe devices for each specific temperature, thus greatly increasing the user's monetary investment in probe devices.
Another solution would be to find a plastic or other suitable dielectric that matches the coefficient of thermal expansion of the silicon wafer. To date, however, the most practical choices of dielectric materials have expansion rates much higher than silicon.
One disadvantage of a plastic housing is that of electrical impedance characteristics. The tester and the probe device, which is generally mounted on a round printed circuit board, are designed to provide a certain characteristic impedance—usually 50 ohms. Such a design typically employs a ground plane or concentric metallic shield in relation to the conductor. The surface areas of the two conductors, the distance by which they are separated, and the dielectric constant of the dielectric material between the conductors determines the impedance. The plastic housing introduces a discontinuity in the desired characteristic impedance.
Another disadvantage of a plastic housing is that most plastics have a limited high temperature capability, preventing their use for vertical pin probing devices used to probe ICs at very high temperatures.
Accordingly, one object of the present invention is to provide a temperature compensated vertical pin probing device for probing integrated circuits over a large temperature range.
Another object of the invention is to provide an improved vertical pin probing device providing an improved electrical impedance match to the typical 50 ohm system impedance.
Still another object of the invention is to provide an improved vertical pin probing device suitable for probing integrated circuits at very high temperatures.
SUMMARY OF THE INVENTION
Briefly stated, the invention comprises an improved temperature compensated vertical pin probing device for probing integrated circuits over a large temperature range, the integrated circuits having spaced contact pads on a circuit substrate to be contacted by probe pins for testing, the probing device being of a known type comprising upper and lower spaced die members respectively defining upper and lower patterns of holes therethrough corresponding to the integrated circuit contact pad spacing at a preselected temperature, and a plurality of probe pins, each pin being disposed in a pair of upper and lower holes and extending beyond the lower die to terminate in a probe tip. The improvement comprises at least one of the die members having a die substrate with a coefficient of thermal expansion substantially the same as that of the circuit substrate, the die substrate having at least the inside of the holes in the die substrate coated with a layer of wear-resistant insulating material having a lubricity permitting sliding of the probe pins in the holes. In its preferred embodiment the die substrate is comprised of one or more thin foils of Invar metal alloy and the insulating coating is a dielectric coating of Parylene coated with an anti-stick material such as XYLAN®P-92DF. Parylene is the generic name for poly-para-xylylene or DPXN which offers high dielectric strength and may be deposited in the vapor phase for conformal coating on all sides to form a pinhole free-continuous insulating coating.


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IBM, C-4 Product Design Manual, vol. 1: Chip and Wafer Design Chapter 9, Wafer Probing. Manual distributed to Sematech, MCNC at seminars in 1993 and 1994.

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