Temperature-compensated current reference circuit

Details Temperature-compensated current reference circuit Temperature-compensated current reference circuit

2003-04-03

2004-10-26

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C327S540000

Reexamination Certificate

active

06809575

ABSTRACT:

PRIORITY CLAIM
This application claims priority to Italian Application Serial Number 2002A000803, filed Sep. 16, 2002.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to current-reference circuits. More particularly, the present invention relates to temperature-compensated current-reference circuits.
2. The State of the Art
In integrated circuit applications such as flash memory, EEPROM, and others, certain circuits require a constant current that is independent of variations in temperature and supply voltage.
Numerous techniques exist for designing current references to be unaffected by supply-voltage and temperature variations. One way to generate a current reference that is robust with respect to supply-voltage variation but sensitive to temperature variation is to employ two current mirrors and a resistor as shown in FIG.
1
. The current through p-channel MOS transistor
10
is mirrored through p-channel MOS transistor
12
. The current through n-channel MOS transistor
14
is mirrored through n-channel MOS transistor
16
, having resistor
18
coupled between its source and ground.
The circuit of
FIG. 1
has a current variation of up to about 30% as a function of temperature. For circuits of the type shown in
FIG. 1
, the current generated is equal to:
I=n*Ut
*ln(
M
)/
R
if the transistors are in weak inversion and
I
=(2
/Kn*R
2
)*&psgr;(
I
)
if the transistors are in strong inversion. In both cases the current is independent of the supply voltage but temperature variation is uncompensated.
Another way to provide a current reference is to employ a resistor and a bipolar transistor as shown in
FIG. 2
to generate a current that is proportional to both absolute temperature and the temperature coefficient of the resistor.
P-channel MOS transistors
20
and
22
have their gates driven from the output of operational amplifier
24
. PNP bipolar transistor
26
has its emitter coupled to the drain of p-channel MOS transistor
20
and its base and collector coupled to ground. PNP bipolar transistor
28
has its emitter coupled to the drain of p-channel MOS transistor
20
through resistor
30
and its base and collector coupled to ground. One input of operational amplifier
24
is coupled to the drain of p-channel MOS transistor
20
and the other input of operational amplifier
24
is coupled to the drain of p-channel MOS transistor
22
.
In the circuit of
FIG. 2
, the current is given by:
I
=(
Ut/R
)*ln(
N
)
In order to provide temperature compensation, the temperature coefficient of the resistor must be opposite to Ut.
BRIEF DESCRIPTION OF THE INVENTION
The present invention provides a temperature-compensated current reference using only a MOS transistor and polysilicon resistor of the same type.


REFERENCES:
patent: 5821564 (1998-10-01), Wu et al.
patent: 6388507 (2002-05-01), Hwang et al.
patent: 6392472 (2002-05-01), Kobayashi et al.
patent: 6407622 (2002-06-01), Opris
patent: 6452437 (2002-09-01), Takeuchi et al.
patent: 6501299 (2002-12-01), Kim et al.
patent: 2003/0160649 (2003-08-01), Nakai
B. Razavi,Design of Analog CMOS Integrated Circuits, McGraw-Hill Series in Electrical and Computer Engineering, pp. 379 and 391, 2001.

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