Temperature and process compensated LDMOS drain-source voltage

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S333000, C327S362000, C327S378000, C327S513000

Reexamination Certificate

active

06384643

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates, in general, to high current circuitry used in electronic devices, and in particular, to feedback circuitry providing constant drain-source voltage without temperature or process variation.
BACKGROUND OF THE INVENTION
The continual demand for enhanced circuit performance places a number of demands on circuitry designs. High current driver circuitry is one such demanding circuitry application. MOS (metallic oxide semiconductor) devices are commonly used in high current applications. For example, LDMOS (Lateral Diffused MOS) devices are often used to provide switching functionality. The LDMOS process is often more area efficient, and therefore less costly, than other comparable semiconductor processes. However, R
DS(on)
(drain-source on-resistance) for LDMOS can vary greatly; being typically very temperature dependent for a fixed gate-source voltage. Also, R
DS(on)
can vary greatly over normal wafer fab process limits. As a result, LDMOS drain-source voltage in such applications may vary greatly; thus affecting current and power supplied to a load, and overall system performance and reliability.
Previously, applications incorporated no solution to such problems, suffering the consequences and sacrificing system performance. Some attempts were made to address singular aspects of the variance problems; leaving other aspects unaddressed and remaining to degrade system performance. For example, a previous approach may have generated a temperature dependent gate-source voltage by varying gate drive supply voltage. Such an approach does not completely address variance, however, as the temperature dependent gate-source voltage is not closely matched to LDMOS characteristics, and thus only partial temperature compensation of R
DS(on)
is achieved. Such a technique does not compensate for process variations, and does not maintain consistent drain-source voltage as load current is varied. Thus, conventional systems typically don't address impacts of and the need for constant drain-source voltage (without temperature or process variation), or address them incompletely (only one-dimensionally).
SUMMARY OF THE INVENTION
Therefore, circuitry which adjusts gate-source voltage to maintain approximately a constant drain-source voltage, immunizing system circuitry from effects of R
DS(on)
variation, is now needed; providing enhanced design performance while overcoming the aforementioned limitations of conventional methods.
In the present invention, a feedback circuit is provided to adjust gate-source voltage; maintaining approximately constant drain-source voltage and immunizing the system circuitry from effects of R
DS(on)
variation by compensating that variation. This feedback approach utilizes drain-source voltage to generate required gate-source voltage over temperature, process, and current variations; maintaining constant drain-source voltage.
In one embodiment of the present invention, feedback circuitry is inter-coupled with driver and reference circuitry. The system of circuits, particularly the feedback circuitry, operates to equalize the voltage level of an output in the driver circuitry with a reference voltage source in the reference circuitry.
Another embodiment of the present invention provides for multiple instances of the driver and feedback circuits to be switchably coupled to a single reference circuit.


REFERENCES:
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patent: 5376846 (1994-12-01), Houston
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patent: 5912577 (1999-06-01), Takagi
patent: 5990711 (1999-11-01), Sekimoto
patent: 6066975 (2000-05-01), Matano
patent: 6265915 (2001-07-01), Rider et al.

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