Television tuner having variable gain reduction

Television – Receiver circuitry – Tuning

Reexamination Certificate

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Details

C375S345000, C455S334000

Reexamination Certificate

active

11040126

ABSTRACT:
An integrated circuit comprises a switching transistor having an emitter connected to a grounding terminal, a first resistor connected between a first gate of a first field-effect transistor and the grounding terminal, a second resistor connected between the first gate of the field-effect transistor and a collector of the switching transistor, and a third resistor connected between the collector of the switching transistor and a drain of the field-effect transistor. The integrated circuit further comprises a bias voltage terminal connected to the collector of the switching transistor to apply a voltage to the bias voltage terminal from the outside of the integrated circuit via a sixth resistor.

REFERENCES:
patent: 6566953 (2003-05-01), Yamamoto
patent: 2001-320647 (2001-11-01), None
patent: 2002-368639 (2002-12-01), None

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