Television siganl memory write circuit

Details Television siganl memory write circuit Television siganl memory write circuit

1987-04-13

1989-08-15

Britton, Howard W.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358339, H04N 504

Patent

active

048580090

ABSTRACT:
A television signal memory (21) for use, for example, in a circuit for increasing the number of fields with interleaved writing and reading, is controlled by a data signal to be written into (at 19) with the aid of a write clock signal (at 77), this data signal being obtained by sampling (at 5) of the television signal by means of a data clock signal (at 25) coupled to the line frequency of the television signal (37, 41). A phase detection circuit (33) detects each time a given phase relation, between the data clock signal (at 31) and a memory clock signal (at 51) obtained form a free running memory clock signal generator (55) having a higher frequency than the highest data clock signal frequency, is exceeded, and then suppresses a memory clock signal pulse in a pulse suppression circuit (71), and shifts the data in a data shift circuit (15) so that the memory receives a single write clock signal pulse during the occurrence of each data period.

REFERENCES:
patent: 4439786 (1984-03-01), Claydon et al.
patent: 4468698 (1984-08-01), Kavoussi et al.
patent: 4561083 (1985-12-01), Nishikawa et al.

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