Telephone switching system frame sync generator

Multiplex communications – Wide area network – Packet switching

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328 62, H04J 302

Patent

active

048005584

ABSTRACT:
A circuit is described for use in a telephone switching system, for generating a large number of frame sync pulses that are progressively offset in time from one another, and that each control the operation of a pair of codecs (coder/decoder circuits). A high frequency clock signal is divided to generate a series of square waves that are 2's multiples of the lowest frequency square wave, such as 8 kHz, 16 kHz, 32 kHz, 64 kHz, and 128 kHz. These square waves are inputted to an integrated circuit of a type commonly used for addressing, to generate pulses on the several outputs at controlled different times, these pulses being delivered to the codecs. A plurality of such integrated circuits are used, with the inverse of the lower frequencies also being generated, and with different combination of the lower frequencies and their inverses delivered to different ones of the integrated circuits.

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patent: 4419918 (1983-12-01), Dyck et al.
patent: 4594705 (1986-06-01), Yahata et al.
patent: 4601029 (1986-07-01), Hargrave et al.
patent: 4645947 (1987-02-01), Prak
Millman, "Microelectronics", pp. 220-231, McGraw-Hill Book Company, 1979.

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