Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1991-08-26
1995-11-28
Mintel, William
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257758, 257774, 257775, H01L 2348
Patent
active
054710910
ABSTRACT:
Via filling is enhanced by the techniques of 1) providing pillars immediately underneath semiconductor features, such as metal layer contacts (inter-connection points), and 2) polishing off excess via-filling material so that the via-filling plug is flush with the topmost insulating layer. The pillars are provided under every feature over which a via will be formed, so that an insulating layer surrounding the via will be thinner at the location of the feature. If necessary, polishing is continued to thin the insulating layer so that the plugs in initially selectively under-filled vias are made flush with the insulating layer. Method and apparatus are disclosed.
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Thin Film Processes, by Vossen et al., pp. 497-521, 1978.
Pasch Nicholas F.
Patrick Roger
LSI Logic Corporation
Mintel William
Potter Roy
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