Techniques for implementing address recycling in memory...

Static information storage and retrieval – Addressing – Multiplexing

Reexamination Certificate

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C365S230010, C365S230080, C711S003000, C711S211000

Reexamination Certificate

active

06961280

ABSTRACT:
Techniques are provided for recycling addresses in memory blocks. Address signals in memory blocks are stored temporarily in a set of parallel coupled address registers. The address registers transfer the address signals to an address decoder block, which decodes the address signals. The address decoder block transfers the decoded addresses to a memory array. A stall state occurs when the cache memory block needs a new set of data to replace the old set of data. Address signals are stored in the address registers during the stall state by coupling each register's output to its data input using a series of multiplexers. The multiplexers are controlled by an address stall signal that indicates the onset and the end of a stall state. After the end of a stall state, the address registers store the next address signal received at the memory block.

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