Techniques and circuits for high yield improvements in programma

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

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257209, 34082584, 337293, 326 10, 326 13, 326 39, H03K 19177

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059259205

ABSTRACT:
The present invention provides a method and apparatus for high yield improvements in programmable logic devices using redundancy. The present invention concerns a programmable logic device comprising a plurality of routings lines coupled to a plurality of logic blocks when programmed. During programming, a path is routed through the routing lines by programming the selected programmable elements. The selected programmable elements are located at each interconnect point between at least two routing lines or two segments of a routing lines along the path. The programmable elements include at least two interconnect circuits coupled in parallel. The programmable element is successfully programmed when at least one of the interconnect circuits is functional after programming.

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MacArthur, James B., Lacey, Timothy M.: U. S. Patent Application entitled "Techniques and Circuits for High Yield Improvements in Programmable Devices Using Redundant Logic," mailed Jun. 12, 1996, Express Mail No. TB907643759US.
MacArthur, James B., Lacey, Timothy M.: U.S. Patent Application entitled "Techniques and Circuits for High Yield Improvements in Programmable Devices Using Redundant Logic" filed Jun. 12, 1996; Application No.: 08/662,054.

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