Data processing: generic control systems or specific application – Generic control system – apparatus or process – Sequential or selective
Reexamination Certificate
2001-03-16
2003-11-25
Patel, Ramesh (Department: 2121)
Data processing: generic control systems or specific application
Generic control system, apparatus or process
Sequential or selective
C700S002000, C700S020000, C700S023000, C700S039000, C700S040000, C700S078000, C714S011000, C714S012000, C714S023000, C701S022000, C701S029000, C701S034000
Reexamination Certificate
active
06654648
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a series of processing carried out when there is an error, for example, an operation error, in any of a plurality of CPUs or a plurality of controllers included in a hardware configuration. In one concrete application, the present invention pertains to a control technique applied for a moving object with a prime mover or more specifically to a technique of monitoring abnormality in a plurality of CPUs. In another concrete application, the present invention pertains to a technique of detecting an error in a control system including at least two controllers. The technique detects a processing error in any of the at least two controllers included in the control system. The control system has an arithmetic logic unit that functions under the control of a predetermined program, and includes the at least two controllers that respectively carry out specific controls according to the predetermined program.
2. Description of the Related Art
The latest size and cost reductions of computer-aided controllers often cause a large number of controllers to be incorporated in a variety of apparatuses and work as one total control system. For example, a diversity of controllers including an engine controller that controls an engine and a brake controller that regulates the braking force are incorporated in a vehicle, which is one of moving objects with prime movers. The diversity of controllers mutually transmit required information via communication lines and function as a comprehensive control system that totally controls the moving object. This arrangement is not restricted to the vehicles but may be applied in a variety of fields, for example, other moving objects like aircraft and ships, machine tools, plant control apparatuses, and manufacturing equipment.
The arrangement of controlling the whole apparatus or the whole system not with a single computer but with a large number of controllers desirably restricts the required control range of each controller and advantageously simplifies the processing program used in each controller and facilitates verification of the validity of the processing. This arrangement also limits the total number of inputs into and output from each controller and thus enhances the processing speed of connected elements like actuators.
In the control system that utilizes a plurality of controllers for the control, the important issue is how to handle the error arising in each controller. A digital controller generally has a monitoring circuit that monitors the operation of a CPU of interest and resets the CPU of interest in response to detection of abnormality arising in the CPU of interest. The monitoring circuit may be another CPU, which is different from the CPU of interest, or a watchdog circuit.
For example, the technique disclosed in JAPANESE PATENT LAID-OPEN GAZETTE No. 5-143496 utilizes an auxiliary CPU to monitor a main CPU in an air bag unit for the vehicle. The auxiliary CPU monitors the operation of the main CPU, and activates an inhibitor circuit in response to detection of abnormality arising in the main CPU, so as to prohibit signals from being output from the main CPU to an external circuit.
A monitoring circuit adopted in a controller of a power-driven steering wheel is disclosed in JAPANESE PATENT LAID-OPEN GAZETTE No. 11-314573. A watchdog timer or an excess current detection circuit may be applied for the monitoring circuit.
In the case where a plurality of CPUs are used to control a moving object, the applicable construction may allow the CPUs to mutually monitor the operations of the opposite CPUs For example, in one possible configuration, each of two CPUs, which respectively control two prime movers, monitors the operation of the opposite CPU and resets the opposite CPU in response to detection of abnormality arising in the opposite CPU.
In the structure that the plurality of CPUs mutually monitor the opposite CPUs, when one CPU is reset, the CPU successively resets another CPU at the time of reactivation. This is because the reset operation of one CPU generally causes the whole peripheral circuit configuration including the CPU to be reset. This leads to endless circulation of the reset operations of the CPUs and thus prevents the controller from being restored to the normal state.
Some abnormality of the controller is ascribed to abnormality arising in an arithmetic logic operation circuit. If there is any abnormality in an arithmetic logic operation circuit included in a controller, the controller can not detect the occurrence of an error properly.
The distribution of the control to a large number of controllers leads to another technological issue; that is, how to ensure the validity of the processing carried out by another controller. A measure against this issue has been proposed in JAPANESE PATENT LAID-OPEN GAZETTE No. 9-46803. This proposed technique causes the respective controllers to mutually transmit data processed therein, carry out comparison between the transmitted data, and stop the control in the case of inconsistency. Another technique proposed in various ways provides a specific apparatus exclusively used to verify the validity of the processing (for example, a diagnosis computer) and monitor the operation of each controller. As discussed above, there is another widely known technique that provides a watchdog timer to detect abnormality in the sequential series of processing, for example, due to a bug existing in a processing program, in each controller and reset the controller.
Any of these proposed techniques, however, undesirably increases the number of objects, which are subjected to verification for the validity of the processing, in geometric progression with an increase in number of controllers, an increase in number of plants, which are the objects to be controlled by the controllers, or with an increase in quantity of information transmitted therebetween. This leads to the significantly heavy loading relative to the load of the processing to be executed in the respective controllers. One possible measure to prevent such heavy loading is to use the diagnosis computer exclusively used for the verification. Under the condition of the increasing number of signal lines or the increasing quantity of information output from each controller to the diagnosis computer, however, this structure does not ensure the real-time verification. The use of the specific device exclusively used to verify the validity of the processing makes the structure of the whole control system undesirably complicated and raises the required cost.
When the respective controllers carry out significantly complicated operations, another issue arises; that is, how to and what to be verified. One possible measure against this issue allocates the weights to the operations carried out by the respective controllers and carries out strict verification for the operation that generates essential data important for the whole system and for the essential operation important for the control of the whole system. In the moving object like a vehicle, however, any data may be regarded as important and essential. The constructed system is thus required to verify all the operations carried out therein. There has accordingly been no comprehensive measure against the above issues.
SUMMARY OF THE INVENTION
The object of the present invention is thus to provide a comprehensive technique that detects a processing error arising in any of at least two controllers included in a control system, where each of the at least two controllers includes an arithmetic logic operation unit that follows a specific program, and carries out predetermined processing according to the specific program.
At least part of the above and the other related objects is actualized by a technique that utilizes a plurality of controllers, which are connected with one another and include a first controller and a second controller, to control operations of an object. The first controller has a first reset ex
Matsumoto Shin-ichi
Nada Mitsuhiro
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