Technique for the operational life test of microprocessors

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364579, 371 16, 371 18, G06F 1130, G05B 2302

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active

047062088

ABSTRACT:
The present invention relates to an Operational Life Test (OLT) or "burn-in" technique for testing microprocessors. In accordance with the present invention, an OLT chamber is provided wherein many Evaluation Boards are mounted within racks in a frame in the chamber, each Board being designed for separately exercising its associated microprocessor integrated circuit (IC). During the OLT or burn-in procedure, each Evaluation Boards runs its own internally stored diagnostics, simultaneously with other Boards, to exercise the associated microprocessor ICs while the power to the Boards and the environment within the chamber is appropriately cycled to simulate system testing, installation or normal customer use. During the OLT procedure, each Board periodically reports the status of the associated microprocessor IC to circuitry such as a computer outside the chamber in order to provide a means for determining and recording any failure of a Board.

REFERENCES:
patent: 3969618 (1976-07-01), Strubel et al.
patent: 4125763 (1978-11-01), Drabing et al.
patent: 4371952 (1983-02-01), Schuck
patent: 4402055 (1983-08-01), Lloyd et al.
patent: 4495622 (1985-01-01), Charruau
patent: 4581738 (1986-04-01), Miller et al.
Nutburn, Proceedings of Microtest, Brighton, England, Apr. 2-5, 1979, pp. 52-65.
Farnholtz, The W. E. Engineer, vol. XXV, No. 3, Fall 1981, pp. 3-9.
Belt et al., New Electronics, vol. 14, No. 22, Nov. 10, 1981, pp. 44, 49.
Jensen et al., "Burn-In", John Wiley & Sons, 1982, pp. 1, 47-75.
Brown, New Electronics, vol. 14, No. 22, Nov. 10, 1981, pp. 78-80.
Colman et al., Southcon/82 Conf. Rec., Mar. 23-25, 1982, Orlando, Fla., pp. 20/2.1-20/2.5.

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