Technique for reducing via capacitance

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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Details

C029S600000, C029S846000, C174S265000, C174S250000, C174S266000, C333S260000, C333S033000

Reexamination Certificate

active

11012127

ABSTRACT:
A technique for reducing via capacitance is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for reducing via capacitance. The method may comprise forming, in a circuit board, a via hole that bridges a first trace and a second trace. The method may also comprise forming a channel in a sidewall of the via hole. The method may further comprise filling the via hole and the channel with a conductive material. The method may additionally comprise removing the conductive material from the via hole without depleting the channel, thereby forming an interconnect that couples the first trace to the second trace.

REFERENCES:
patent: 4543715 (1985-10-01), Iadarola et al.
patent: 6891272 (2005-05-01), Fjelstad et al.

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