Technique for reducing a parasitic DC bias voltage on a sensor

Details Technique for reducing a parasitic DC bias voltage on a sensor Technique for reducing a parasitic DC bias voltage on a sensor

2005-08-17

2008-08-12

Dole, Timothy J (Department: 2831)

Electricity: measuring and testing

Using ionization effects

For analysis of gas, vapor, or particles of matter

C324S685000

Reexamination Certificate

active

07411402

ABSTRACT:
A technique for reducing a parasitic DC bias voltage on a sensor monitors the parasitic DC bias voltage on a first element of the sensor. A controlled bias voltage that is applied between the first element of the sensor and a second element of the sensor is then modified to substantially maintain the parasitic DC bias voltage at a desired potential.

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patent: 2005/0127920 (2005-06-01), Mowery et al.
patent: 2007/0056352 (2007-03-01), Birkhofer et al.
patent: WO 2005003755 (2005-01-01), None

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