Technique for optimizing the number of IC chips obtainable from

Details Technique for optimizing the number of IC chips obtainable from Technique for optimizing the number of IC chips obtainable from

1995-03-14

1997-12-16

Ruggiero, Joseph

Boots, shoes, and leggings

355 53, 36416701, 364491, G06F 1900

Patent

active

056992602

ABSTRACT:
The yield of good die from wafers is optimized by positioning the first level mask with respect to the wafer in accordance with a calculated alignment relationship based on physical characteristics of the wafer and the size of the die to be formed in the wafer. The calculated alignment relationship establishes the offset between the wafer and the mask which will result in the maximum available die. This offset is calculated by a computer which examines a number of prospective offsets between the center of one of the die and the center of the wafer. The number of available die is calculated for each such offset, and the offset which maximizes the available die from the wafer is determined.

REFERENCES:
patent: 3716296 (1973-02-01), Springer et al.
patent: 4530587 (1985-07-01), Kosugi et al.
patent: 5305222 (1994-04-01), Nakamura
patent: 5448333 (1995-09-01), Iwamoto et al.
patent: 5448488 (1995-09-01), Oshima

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