Technique for modifying an integrated circuit layout

Details Technique for modifying an integrated circuit layout Technique for modifying an integrated circuit layout

1989-10-13

1993-07-27

Trans, Vincent N.

Boots, shoes, and leggings

364490, 364489, 364488, G06F 1560

Patent

active

052315908

ABSTRACT:
An existing integrated circuit layout is modified or revised in order to shrink it, update it, modify it for merger with another circuit on a single chip, or the like, in a manner which assures, prior to implementing the modified layout in an integrated circuit chip, that the electronic circuit implemented by it has not inadvertently been modified in the process. Data of the existing layout is first run on a net list extractor computer software program in order to determine its net list. After the layout is modified by usual computer techniques, the modified layout data is run on the extractor program to obtain another net list, and the net lists are then compared for any undesired differences. Once the modified layout has been determined to be free of any such differences, a set of masks are made from the modified database. The masks are used then used to manufacture the integrated circuit.

REFERENCES:
patent: 4805113 (1989-02-01), Ishii et al.
patent: 4813013 (1989-03-01), Dunn
patent: 4831543 (1989-05-01), Mastellone
patent: 4922432 (1990-05-01), Kobayashi et al.
patent: 4967367 (1990-10-01), Piednoir

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