Technique for jointly performing bit synchronization and error d

Details Technique for jointly performing bit synchronization and error d Technique for jointly performing bit synchronization and error d

1996-04-12

1997-06-03

Safourek, Benedict V.

Multiplex communications

Communication over free space

Combining or distributing information via time channels

371 471, 375365, 370514, H04L 704

Patent

active

056362080

ABSTRACT:
An improved technique for simultaneously performing bit synchronization and error detection of received digital data bursts in a time division multiplexed/time division multiple access (TDM/TDMA) system, such as that used in conjunction with low power portable digital telephony. With the improved technique both bit synchronization and error detection are performed simultaneously to thereby reduce latency in the transceiver. Since round-trip delay is reduced, echo suppression techniques may not be needed.

REFERENCES:
patent: 4984249 (1991-01-01), Long et al.
patent: 5392289 (1995-02-01), Varian
patent: 5473615 (1995-12-01), Boyer et al.
patent: 5539751 (1996-07-01), Sabel

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