Technique for implementing a security algorithm

Cryptography – Communication system using cryptography – Symmetric key cryptography

Reexamination Certificate

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C380S059000, C365S078000, C365S080000, C365S189120, C365S240000, C377S054000, C377S057000, C377S064000, C708S233000, C708S234000, C708S252000, C708S253000, C708S256000, C708S521000, C708S524000, C327S241000, C327S403000, C711S109000, C345S100000, C345S505000, C345S506000, C712S212000, C382S303000, C382S304000

Reexamination Certificate

active

07747020

ABSTRACT:
Performing a hash algorithm in a processor architecture to alleviate performance bottlenecks and improve overall algorithm performance. In one embodiment of the invention, the hash algorithm is pipelined within the processor architecture.

REFERENCES:
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patent: 5963646 (1999-10-01), Fielder et al.
patent: 6134603 (2000-10-01), Jones et al.
patent: 6847995 (2005-01-01), Hubbard et al.
patent: 7177421 (2007-02-01), Buer et al.
patent: 2002/0001384 (2002-01-01), Buer et al.
“On Recent Results for MD2, MD4, and MD5,” M.J.B. Robshaw, RSA Laboratories, Bulletin No. 4 Nov. 12, 1996.

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