Electrical connectors – With indicating or identifying provision – Connection indicating provision
Reexamination Certificate
2002-11-13
2004-02-17
Duverne, Jean F. (Department: 2839)
Electrical connectors
With indicating or identifying provision
Connection indicating provision
Reexamination Certificate
active
06692293
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a technique for identifying multiple circuit components and, more particularly, to a technique for identifying the location of multiple memory modules.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Microprocessor-based systems generally incorporate a plurality of electrical components. Electrical components, such as control chips, processor chips and memory modules, are often mounted on a substrate such as a printed circuit board or a ceramic board. The substrates generally contain conductive traces which allow the electrical components to be electrically coupled to each other via the substrate. Aside from connecting the electrical devices to one another, the substrate often provides a means of routing electrical signals to and from the components on the substrate to other substrates or external components of the system.
For example, a computer system may include dozens of electrical devices, including memory devices. Several memory devices may be disposed on a single printed circuit board thereby creating a memory module or memory cartridge. The signals from the memory devices are routed to the edge of the printed circuit board so that the memory cartridge can be coupled to other system components. The memory cartridge may be electrically coupled to another substrate containing various other electrical components such as other memory devices, controllers, processors, or drivers, for instance. Furthermore, a plurality of memory cartridges may be mounted on a single printed circuit board thereby creating an array of memory cartridges.
Occasionally, when a system is running, one or more of the memory cartridges may fail. In this instance, it may be desirable to change the faulty memory cartridge. Further, it may be desirable to change the memory cartridge without powering down the entire system or disrupting normal operations. In the past, memory cartridges have been physically secured and electrically coupled to a substrate using solder or some other means of permanently attaching the memory cartridge to the substrate. This makes removal and replacement of the memory cartridges difficult. In other instances, the memory cartridge may be attached to the substrate by a connector which will permit removal of the memory cartridge. However, replacing the bad memory cartridge often requires powering the system down.
The present invention may address one or more of the problems set forth above.
SUMMARY OF THE INVENTION
Certain aspects commensurate in scope with the disclosed embodiments are set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of certain forms the invention might take and that these aspects are not intended to limit the scope of the invention. Indeed, the invention may encompass a variety of aspects that may not be set forth below.
In one embodiment of the present invention, there is provided a system comprising a first substrate, a plurality of connectors, and a plurality of second substrates. The first substrate is configured to provide a plurality of unique identifiers corresponding to a plurality of locations on the first circuit board. The connectors are mounted on the first substrate in a variety of locations. Each connector has a unique identification device configured to receive a corresponding unique identifier. A second substrate is mounted on and electrically coupled to each of the connectors so that the unique identifier associated with each connector will also correspond to the second substrate.
According to another embodiment of the present invention, there is provided a system comprising a first substrate and a plurality of connectors. The plurality of connectors is mounted on the first substrate and configured to receive a plurality of second substrates. Each connector includes a plurality of unique identification devices configured to provide a unique identifier to the connector. Electrical signals are received by the first substrate and routed to the unique identification device on each connector, thereby providing a unique identifier for each connector and corresponding second substrate.
According to still another embodiment of the present invention, there is provided a method of identifying the location of a substrate in a system. A plurality of connectors is mounted on a first substrate. Each connector includes a plurality of pins which are electrically coupled to the first substrate. A logical signal is applied to each pin thereby providing a unique identifier for each connector. A second substrate is mounted on each connector and electrically coupled to each pin in the connector. A control device on each of the second substrates latches the logical signals from the connector to a chip on the substrate.
REFERENCES:
patent: 3191095 (1965-06-01), Hefti
patent: 4675769 (1987-06-01), Marshall et al.
patent: 5203004 (1993-04-01), Bunton et al.
patent: 5313626 (1994-05-01), Jones et al.
patent: 5329690 (1994-07-01), Tsuji et al.
patent: 5331646 (1994-07-01), Krueger et al.
patent: 5367669 (1994-11-01), Holland et al.
patent: 5530623 (1996-06-01), Sanvo et al.
patent: 5991158 (1999-11-01), Chan et al.
patent: 6007357 (1999-12-01), Perino et al.
patent: 6056579 (2000-05-01), Richards, III et al.
patent: 6098132 (2000-08-01), Olarig et al.
patent: 6223301 (2001-04-01), Santeler et al.
Larson John
MacLaren John M.
Duverne Jean F.
Hewlett--Packard Development Company, L.P.
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