Technique for forming contacts for buried doped regions in a...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C370S447000, C370S902000

Reexamination Certificate

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07064074

ABSTRACT:
A semiconductor device comprises an isolation trench and a contact trench that may contact a buried conductive region. The contact trench comprises insulating sidewall spacers that are formed during the filling of the isolation trench with an insulating material and the subsequent anisotropic etching of the excess material. Thereafter, the contact trench is filled with a conductive material. Thus, the formation of a contact for a buried region may be carried out simultaneously with the formation of a trench isolation structure, thereby minimizing the number of process steps required.

REFERENCES:
patent: 4256514 (1981-03-01), Pogge
patent: 5629238 (1997-05-01), Choi et al.
patent: 5872045 (1999-02-01), Lou et al.
patent: 6091154 (2000-07-01), Ohkawa
patent: 6096612 (2000-08-01), Houston
patent: 6479377 (2002-11-01), Tang et al.
patent: 6498372 (2002-12-01), Brown et al.

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