Technique for forming an isolation trench as a stress source...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S433000, C438S435000, C257SE21632, C257SE29242

Reexamination Certificate

active

07833874

ABSTRACT:
By forming a non-oxidizable liner in an isolation trench and selectively modifying the liner within the isolation trench, the stress characteristics of the isolation trench may be adjusted. In one embodiment, a high compressive stress may be obtained by treating the liner with an ion bombardment and subsequently exposing the device to an oxidizing ambient at elevated temperatures, thereby incorporating silicon dioxide into the non-oxidizable material. Hence, an increased compressive stress may be generated within the non-oxidizable layer.

REFERENCES:
patent: 2004/0087079 (2004-05-01), Chen et al.
patent: 2004/0212035 (2004-10-01), Yeo et al.
patent: 2005/0008790 (2005-01-01), Kapoor et al.
patent: 2005/0139949 (2005-06-01), Lee
patent: 2007/0015347 (2007-01-01), Mehta et al.
patent: 2007/0032039 (2007-02-01), Chen et al.
Taylor, S; Zhang, JF; Eccleston, W; “A review of the plasma oxidation of silicon and its application”, Semicond. Sci. Technol. 8 (1993) 1426-1433.

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