Technique for filter-enhanced clock synchronization

Details Technique for filter-enhanced clock synchronization Technique for filter-enhanced clock synchronization

2003-12-11

2008-08-05

Odom, Curtis B (Department: 2611)

Pulse or digital communications

Receivers

Interference or noise reduction

C375S345000, C375S359000, C375S362000

Reexamination Certificate

active

07409020

ABSTRACT:
A technique for filter-enhanced clock synchronization is disclosed. In one particular exemplary embodiment, the technique may be realized by/as a method for filter-enhanced clock synchronization. The method comprises subjecting a clock error signal to a first exponentially weighted moving average (EWMA) filter to generate a first output signal, where the first EWMA filter comprises a first gain element. And the method further comprises subjecting the first output signal to a second EWMA filter to generate a second output signal, where the second EWMA filter comprises a second gain element and the second EWMA filter is coupled with a feedback loop having a delay element and a summing junction.

REFERENCES:
patent: 6696886 (2004-02-01), Ke et al.
patent: 2003/0056136 (2003-03-01), Aweya et al.

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