Technique for efficiently managing both short-term and...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C327S159000

Reexamination Certificate

active

07579887

ABSTRACT:
A control system for generating an electronic circuit clock signal that can optimize operating frequency margins by responding to short term effects by quickly varying the clock frequency and long term effects by finding an optimal frequency point. A sensor indicates frequency margins associated with safe use of the clock signal, and these frequency margins are input into a frequency compensator and used to determine whether the system is operating within acceptable margins, or alternatively to modify the operating clock frequency on a short-term basis in order to achieve acceptable operating margins. The requests for frequency adjustment by the frequency compensator are provided to a frequency filter, which combines such request with a maintained/accumulated history of previous short-term frequency requests that have previously been made in order to determine whether an update needs to be made to the target frequency to provide long-term frequency control.

REFERENCES:
patent: 5940785 (1999-08-01), Georgiou et al.
patent: 6535986 (2003-03-01), Rosno et al.
patent: 6934872 (2005-08-01), Wong et al.
patent: 7132895 (2006-11-01), Roth
patent: 7385539 (2008-06-01), Vanselow et al.
patent: 2002/0070811 (2002-06-01), Skierszkan
patent: 2006/0215798 (2006-09-01), Nelson
patent: 2007/0025490 (2007-02-01), Azadet et al.
patent: 2007/0222526 (2007-09-01), Mayer et al.
Uht, A.K., “Uniprocessor Performance Enhancement Through Adaptive Clock Frequency Control”, IEEE Computer Society, vol. 54, No. 2, Feb. 2005. pp. 132-140.
Liotta, “Wide Range of Output Frequencies Differentiates Fully Integrated Clock”,retrieved Mar. 3, 2008, pp. 1-3. http://electronicdesign.com/Article/Index.cfm?AD=1&ArticleID=9611.
Mahashin, “Optimize Timing Margins For Your High-Speed Interface”, retrieved on Mar. 5, 2008, pp. 1-9. http://electronicdesign.com/Article/Index.cfm?AD=1&ArticleID=9611.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Technique for efficiently managing both short-term and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Technique for efficiently managing both short-term and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Technique for efficiently managing both short-term and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4138829

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.