Patent
1992-11-19
1994-11-22
Lall, Parshotam S.
395500, 395275, 395375, G06F 900
Patent
active
053676610
ABSTRACT:
A technique, specifically apparatus and an accompanying method, for use in, e.g., a "host" operating system (610), for properly updating a dynamically alterable channel program that controls an input/output (I/O) device so as to emulate a "guest" computer system, that employs dynamic address translation (DAT) in an I/O channel sub-system (150), on a "host" computer system (10) that does not. This technique performs this updating in a manner that significantly increases channel throughput so as to substantially reduce a performance degradation that would otherwise result from a lack of channel DAT on the host system. Specifically, our technique relies on program controlled interrupt (PCI) chaining coupled with use of "just-in-time" translation of each new virtual channel program segment generated by a guest operating system (620) and corresponding updating of channel program (415) then executing on the host computer system.
REFERENCES:
patent: 3725864 (1973-04-01), Clarke et al.
patent: 4056843 (1977-11-01), Bishop et al.
patent: 4090239 (1978-05-01), Twibell et al.
patent: 4320456 (1982-03-01), Heise et al.
patent: 4322793 (1982-03-01), Anderson et al.
patent: 4368513 (1983-01-01), Meltzer
patent: 4373179 (1983-02-01), Katsumata
patent: 4374415 (1983-02-01), Cormier et al.
patent: 4419728 (1983-12-01), Larson
patent: 4424565 (1984-01-01), Larson
patent: 4453211 (1984-06-01), Askinazi et al.
patent: 4459661 (1984-07-01), Kaneda et al.
patent: 4602329 (1986-07-01), Ohtake
patent: 4797812 (1989-01-01), Kihara
patent: 4823261 (1989-04-01), Bank et al.
patent: 4967342 (1990-10-01), Lent et al.
patent: 5014194 (1991-05-01), Itoh
Principles of Operation--IBM Enterprise Systems Architecture/370, Publication No. SA22-7200-0, 1st Ed., Aug. 1988, pp. 2-1 to 2-6, 3-1 to 3-47 and 15-1 to 15-45.
L. H. Seawright et al., "UM/370-A Study of Multiplicity and Usefulness", IBM Systems Journal, vol. 18, No. 1, 1979, specifically the appendix on pp. 12-15.
L. E. Larson et al., "Program Channel Interrupt Chain Scheduling in a Paging Environment", IBM Technical Disclosure Bulletin, vol. 16, No. 4, Sep. 1973, pp. 1127-1129.
Abe Fumiaki
Hough Roger E.
Iimura Kazuo
Ishimoto Kenya
Nishimoto Masao
International Business Machines - Corporation
Lall Parshotam S.
Maung Zarni
Michaelson Peter L.
Porter William B.
LandOfFree
Technique for controlling channel operations in a host computer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Technique for controlling channel operations in a host computer , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Technique for controlling channel operations in a host computer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1997701