TDDB test pattern and method for testing TDDB of MOS...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S548000, C324S551000

Reexamination Certificate

active

06351135

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a TDDB (Time Dependent Dielectric Breakdown) test pattern, circuit and more particularly, to a TDDB test pattern circuit which can reduce a test time period and improve a precision of a measurement result statistically; and a method for testing TDDBs of MOS capacitor dielectric films using the same.
2. Background of the Related Art
A related art TDDB test pattern circuit and a method for testing TDDBs of MOS capacitor dielectric films using the same will be explained.
FIG. 1
illustrates a unit circuit showing a related art TDDB test pattern circuit, and
FIG. 2
illustrates a graph showing an experimental data of TDDB of an MOS capacitor dielectric film measured using FIG.
1
.
Referring to
FIG. 1
, the related art TDDB test pattern circuit includes an MOS capacitor
1
having one electrode grounded and a voltage application electrode
2
for applying a constant voltage V
force
to the other electrode on the MOS capacitor
1
. And, there is an ammeter
3
between the MOS capacitor
1
and the voltage application electrode
2
for measuring a current to the MOS capacitor
1
.
A related art method for testing the TDDB test pattern circuit will be explained. One side of electrode of the MOS capacitor
1
is grounded, the other side of the electrode is applied of a constant stress voltage of Vforce, and current to the MOS capacitor is measured through the ammeter
3
.
FIG. 2
illustrates an example of current to the MOS capacitor along time measured according to the above method, wherein it can be seen that there is a sudden increase of the current time of 340 seconds from an application of the voltage stress to the MOS capacitor
1
, This time period of 340 seconds is the Tbd (Time to breakdown) of the MOS capacitor
1
. In order to measure a Tbd of each MOS capacitor in N unit test pattern circuit cells according to the test method of the related art TDDB test pattern circuit, a test for each of the N test pattern circuit cells is required, i.e., N tests are required. And, if it is assumed that an average time period taken until an MOS capacitor dielectric film in a unit test pattern cell is Tavg, the total time required for measuring a Tbd of each MOS capacitor dielectric film in N unit test pattern circuit cells is N×Tavg.
The related art TDDB test pattern circuit and a method for testing TDDBs of MOS capacitor dielectric films using the same has the following problems.
Significant time period is required for Tbd testing N number of unit test pattern circuit cells, and the use of a testing equipment for a prolonged time period costs high.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a TDDB test pattern circuit and a method for testing TDDBs of MOS capacitor dielectric films using the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a TDDB test pattern circuit and a method for testing TDDBs of MOS capacitor dielectric films using the same, which can shorten a time period required for a test as well as a time period for using a measuring equipment required for the test and reduce a measuring cost.
Another object of the present invention is to provide a TDDB test pattern circuit and a method for testing TDDBs of MOS capacitor dielectric films using the same, which allows to obtain much more test data within the same time period, thereby improving a precision of a measuring result in view of statistics.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the TDDB test pattern circuit includes a plurality of unit test pattern cells each having an MOS capacitor, an MOS transistor, and a fuse for controlling operations of the MOS capacitor and the MOS transistor, a first voltage supplying unit for supplying a stress voltage to the MOS capacitor and the MOS transistor in each unit test pattern cell on the same time, an ammeter for continuous measurement of a total current from the plurality of unit test pattern cells, to measure a total time to breakdown of the plurality of unit test pattern cells, a plurality of VFN's (Voltage Forcing Nodes) each positioned between the first voltage supplying unit and the fuse in the unit test pattern cell, a DCMN (Drain Current Measuring Node) positioned between the ammeter and a drain terminal of the MOS transistor in each of the plurality of unit test pattern cells, and a second voltage supplying unit for applying a voltage to the drain terminal of the MOS transistor.
In other aspect of the present invention, there is provided A method for testing TDDBs of MOS capacitor dielectric films using a TDDB test pattern circuit, including the steps of (1) applying a stress voltage to an input electrode on each of an MOS capacitor and an MOS transistor in each of a plurality of unit test pattern cells from a first voltage supplying unit, and applying a voltage to a drain electrode of the MOS transistor from a second voltage supplying unit, (2) measuring a total drain current from the MOS transistor in each of the plurality of unit test pattern cells, to which the stress voltage is applied, and (3) measuring a last change of the total drain current from the MOS transistor in the plurality of unit test pattern cells, to measure a maximum time to breakdown of a plurality of MOS capacitor dielectric films in the plurality of unit test pattern cells.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 4904946 (1990-02-01), Hirai
patent: 5420513 (1995-05-01), Kimura
patent: 5841164 (1998-11-01), Tsujino
patent: 5886363 (1999-03-01), Hamada et al.

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