Target generation system based on unlimited capacity allocation

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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Details

C705S002000

Reexamination Certificate

active

06654655

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a system and method for planning the product flow in a manufacturing process to ultimately achieve a production goal in a timely manner, and particularly to a target generation system for a processing line that uses the required delivery date of a production order to define related requirements to allocate capacity and move production lots through the manufacturing stages to efficiently deliver the production order on time.
2. Prior Art
In processing lines for performing operations on work pieces, such as those for semiconductor fabrication, there are various processing stages through which a number of product lots must be passed to achieve a production goal. Achieving a production goal in a given time to fulfill a product order requires the setting of targets through the processing to the end of the line. There are many types of target generation systems for production orders derived by simulation tools or by experience gained from process operations. Two examples of such prior art systems are found in U.S. Pat. Nos. 5,872,918 and 5,913,200.
Typically most of the known systems count on current work-in-progress, WIP, distribution and depend purely on “push-out” activities. As a result, the meeting of production deadlines and the efficiency of the processing is often problematical.
Problem to be Solved
It is therefore a problem in the art to achieve a reliable and efficient target generation system for production orders that require the processing of product lots in a sequence of different process stages.
Objects
It is accordingly an object of the present invention to provide a target generation system for reliably and efficiently managing the passing of product lots through a processing line to achieve delivery of a desired product order by a deadline date.
It is another object of the invention to provide a system and method for production line target generation, wherein a number of lots of workpieces are passed through a series of fabrication stages during processing, to ultimately achieve a production goal in a timely manner.
It is also an object of the invention to provide a system and method for target generation in semiconductor wafer fabrication to ensure production of a sufficient number of wafer lots by a preset date to fulfill an order in accordance with a customer's request.
SUMMARY OF THE INVENTION
The present invention involves a method and system for production line target generation based on unlimited capacity allocation and utilizes an algorithm that begins with setting the required delivery date, REQ_DATE, from the purchase order issued by the customer. Based on the REQ_DATE, other related performance factors are defined by backtracking the production line requirements to determine how many stages need to be passed before delivery, and to decide where and how to setup and arrange the production equipment, in order to complete and deliver the ordered goods on time. More particularly, the implementation of the algorithm consists of the following considerations.
The target generation system in accordance with the invention backtracks the production process from the very beginning, which beginning is the purchase order issued by the customer. The purchase order contains the required delivery date, which is the ultimate target, REQ_DATE. From this date, the production line requirements that define how many stages need to be passed by a lot of workpieces or wafers being processed to meet delivery of the order are backtracked and decisions made as to where to setup and arrange the processing equipment to be sure to deliver the specified number of finished goods on time. This contrasts with present target systems, based on linear methods and past experience, wherein, the number of machines required to produce the goods are determined depending on how many goods are needed to meet the goal to deliver the complete goods order on time.
In the backtracking procedure, the target date, REQ_DATE, is first used to determine the days remaining, D
R
, for carrying out and completing the processing, i.e., REQ_DATE−current date (today). The number of lots of material required to fill the order and the number of processing stages that are needed for each lot to be processed are assessed and the number of stages is divided by the days remaining to estimate generally the number of stages/day that will be required for a lot to be completely processed within the available time. However, as the time taken to complete each stage will differ with the particular processes being performed therein, each stage will have a “theoretical process time”, X, i.e., the time taken between when the material of a lot enters the stage and exits the stage. Further, the progress of a lot may be stopped due to manufacturing issues or other conditions, so that some consideration must be given to this situation and time allotted, i.e., “budget time”, which has nothing to do with the required date, REQ_DATE. Also, as the “theoretical process time”, X, does not include lot delivery time or the time for moving a lot from machine to machine, a time factor, k, is derived for each machine, wherein k−1 (X) is for “budget”. K is a performance factor, which may be selected in view of the process being performed by the machine, to accommodate for the “budget time” discrepancy, and typically may be about 3.5 in keeping with the current fabrication process capability in semiconductor wafer processing.
Consequently, in terms of time, the total length of time required to pass through a stage is estimated to be 3.5 X. However, for each stage, the estimated time is not fixed at 3.5 X. Since the progress of the lots through the stages will be monitored and must be adjusted when they fall behind the target, the time estimate for a given stage may be more or less than 3.5 X, depending on how far the given stage is from the last, “wafer out”, stage, and adjustment may-be made accordingly. As the number of processing stages needed to fulfill a particular order will be known, the total time for a lot to pass through all the stages may be estimated by summing the estimated times for each of the stages. Having the total time estimated for a lot to be processed and the number of days available, it can be determined whether there is sufficient time for a lot to pass through a stage per day. If not, consideration may be given to increasing the number of machines in each stage to insure that the required number of lots per day are completed by the deadline date, or the number of stages may be divided by the available days to get the number of stages that must be passed or penetrated per day by each lot and the estimated times for the stages may be adjusted.
Also, the number of lots may be summed up for each stage to obtain the number of goods that will pass a certain stage. By summing each lot's penetration of every defined stage, a stage's plan move (target) in one day can be acquired.
If it is known how many stages need to be passed per day for each lot, then all the lots passed by a particular stage can be summed up. Thus it is known for a certain stage, how many goods will pass through on a particular day, and it is also known how many machines need to be allocated to that stage. Accordingly, the system of the invention sets a target for planning moves for each stage.
The output of this system is a summary list:
Move
Stage 1
1000
Stage 2
 500
Stage 3
 500
.
.
.
.
.
.
Stage n


REFERENCES:
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patent: 5546326 (1996-08-01), Tai et al.
patent: 5818716 (1998-10-01), Chin et al.
patent: 5826238 (1998-10-01), Chen et al.
patent: 5872918 (1999-02-01), Malomsoky et al.
patent: 5880960 (1999-03-01), Lin et al.
patent: 5913200 (1999-06-01), Wakiyama
patent: 6006199 (1999-12-01), Berlin et al.
patent: 6198980 (2001-03-01), Costanza
patent: 6243612 (2001-06-01), Rippenhagen et al.
patent: 6303395 (2001-10-01), Nulman

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