Tapered signal lines

Details Tapered signal lines Tapered signal lines

2007-11-06

2007-11-06

Williams, Alexander Oscar (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257SE23152, C257SE23144, C257SE23167, C257SE27141, C257S773000, C257S644000, C257S665000, C257S776000

Reexamination Certificate

active

10627334

ABSTRACT:
In an integrated circuit, a layer including a plurality of conductive wires is described. A first wire, having sidewalls, is tapered from a proximal end which has a first width to a distal end which has a second width, to reduce width from the first width to the second width, and the first wire also has a substantially vertical surface. A second wire, spaced apart from the first wire, also has a substantially vertical surface. The first wire and the second wire are each horizontally disposed along side each other forming a part of a sidewall capacitor between facing sidewalls. Capacitors are created between the first substantially vertical surface and the second substantially vertical surface, the capacitors are respectively associated with capacitances and with a plurality of loads, the plurality of loads is progressively reduced responsive to a progressive reduction of the capacitances as associated with the first wire taper.

REFERENCES:
patent: 4679088 (1987-07-01), Chiyoma et al.
patent: 6788561 (2004-09-01), Watanabe et al.
patent: 6992394 (2006-01-01), Park et al.
patent: 7028282 (2006-04-01), Roohparvar
patent: 2003/0181018 (2003-09-01), Geusic et al.
patent: 2004/0169260 (2004-09-01), Sylvester et al.
patent: 2004/0266183 (2004-12-01), Miller et al.

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