Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
2000-03-14
2001-09-11
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S676000, C257S692000
Reexamination Certificate
active
06288439
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains to a type of TCP (Tape Carrier Package) semiconductor device. In particular, the present invention pertains to a TCP semiconductor device which has an insulating film that overlaps the main plane of a semiconductor chip.
BACKGROUND OF THE INVENTION
The TCP semiconductor device has been widely used as driving LSI for liquid-crystal display devices because it is thinner than a QFP (Quad Flat Package) and it is easy to install more pins on this kind of semiconductor device. There has been a demand in recent years to use larger liquid-crystal panels in the same size frame. Consequently, the development of a TCP semiconductor device with a smaller planar size is required.
The overlap-type TCP semiconductor device has been developed to meet the aforementioned demand. This semiconductor device has part of an insulating film overlapping the main plane of a semiconductor chip. When a part of the semiconductor chip is overlapped, the external dimensions can be reduced without reducing the planar area of the film for forming the conductor pattern. In other words, as shown in
FIG. 4
, an insulating film
2
having an opening
2
a
smaller than semiconductor chip
1
is used in an overlap-type TCP semiconductor device. Multiple support bumps
5
are formed along the circumference of opening
2
a
together with conductor bumps
4
used for connecting inner leads
3
a
of leads
3
on the surface where the circuit elements are formed, that is, on the main plane of semiconductor chip
1
. With the aid of said support bumps
5
, insulating film
2
is supported on the main plane of semiconductor chip
1
with a prescribed gap between them. Potting resin
6
is supplied to opening
2
of the aforementioned insulating film. As a result, the main plane of semiconductor chip
1
is covered. In this case, the supplied potting resin flows into the space S between semiconductor chip
1
and insulating film
2
formed by support bumps
5
. In this way, the bonding between semiconductor chip
1
and insulating film
2
can be reinforced.
A type of potting resin prepared by adding about 20 wt % (with respect to the total weight) of an organic solvent and about 70 wt % of a filler made of silicon oxide into an epoxy resin has been used widely to coat the aforementioned semiconductor chip. Because the potting resin contains an organic solvent, it is possible to dissolve the epoxy resin and adjust the viscosity. Also, because the potting resin contains the silicon oxide filler, the linear expansion coefficient of the resin can be significantly reduced.
However, while the aforementioned potting resin is being cured, the filler contained in the resin which exists between said semiconductor chip
1
and insulating film
2
might damage the passivation film and oxide film formed on the main plane of semiconductor chip
1
. The damage will cause a short circuit between the different metal layers in the chip. In other words, as shown in
FIG. 5
, the solvent contained in the resin is gasified during the curing stage. The volume is reduced by about 30% compared with that during the potting stage. The space S between semiconductor chip
1
and insulating film
2
becomes narrower with the shrinkage. As a result, the filler with a relatively large size and contained in the resin existing in said space S is sandwiched between the semiconductor chip and the insulating film and thus applies a stress to the main plane of the semiconductor chip. The passivation film and oxidation film will be damaged by the aforementioned stress. As a result, a short circuit will occur between the metal layers in the chip.
Consequently, one purpose of the present invention is to prevent the chip's defects caused by the damage of the passivation film and oxidation film by reducing the stress applied to the main plane of the semiconductor chip during the curing stage of the potting resin.
Another purpose of the present invention is to reduce the stress applied to the main plane of the semiconductor chip without changing the basic structure of the overlap-type TCP semiconductor device.
SUMMARY OF THE INVENTION
In order to realize the aforementioned purposes, the present invention provides a type of semiconductor device characterized by forming an elastic film on the insulating film on the side of the main plane of the semiconductor chip in a so-called overlap-type TCP semiconductor device. The elastic film can be made of solder resist.
The filler made of silicon oxide contained in the supplied potting resin also flows into the space between the semiconductor chip and the insulating film formed by the support bumps. As the potting resin cures, its volume shrinks, also reducing the aforementioned space. As a result, the filler of relatively large size is sandwiched between the main plane of the semiconductor chip and the insulating film and applies stress to the main plane of the chip. However, since the aforementioned elastic film is formed on the surface of the insulating film which has contact with the filler, the stress applied to the aforementioned semiconductor chip can be reduced.
In this case, the aforementioned elastic film is preferred to have an elastic modulus of 165 kgf/mm
2
or less and a thickness of 20 &mgr;m or more.
REFERENCES:
patent: 5442231 (1995-08-01), Miyamoto et al.
patent: 5598030 (1997-01-01), Imai et al.
Peterson Bret J.
Potter Roy
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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