Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2001-01-04
2002-05-28
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S707000, C257S738000, C257S780000, C257S784000, C257S698000, C257S778000, C257S774000, C257S701000, C257S668000, C361S704000, C361S707000, C361S711000
Reexamination Certificate
active
06396141
ABSTRACT:
BACKGROUND
The disclosures herein relate generally to a tape ball grid array (TBGA) and more particularly to a TBGA computer chip package in which interconnection to a ground plane on the tape is made with solder balls.
Tape ball grid array (TBGA) packages offer many of the same advantages as plastic BGAS, namely, excellent durability, improved board space utilization, and ease of surface mount assembly along with the associated yield improvements. TBGA packages go a step further, however, and offer the added benefits of improved signal integrity, better heat dissipation, and extendibility to higher pin counts. To achieve the maximum noise reduction in high speed devices it is necessary for TBGA packages to incorporate an additional metal layer which acts as a ground plane. This extra metal layer is achieved by either using conventional two metal flex circuitry or to electrically connect the stiffener itself.
Two metal flex circuitry in the industry is made by either plating or laminating a thin layer of metal (usually copper) on both sides of a thin polymer film and then interconnecting the two sides with a metallized via. The vias are typically made with either punching, laser milling or chemical etching. These vias are then metallized by first depositing (sputtering or electroless plating) a seed layer of metal into the vias followed by plating up of these vias. In all cases the extra steps of depositing this seed layer and then plating up these vias is time consuming and costly.
There have been various attempts at making electrical interconnection to a ground plane on the tape. One such attempt includes U.S. Pat. No. 5,583,378 which discloses a ball grid array package and method for manufacture of the same. The ball grid array package includes a thermal conductor which is a linearly co-extensive outer layer in an interconnection substrate and forms the outer surface of the ball grid array package. An integrated circuit chip is positioned on the underside of the package in a well region. The well region is either formed directly in the interconnection substrate or is formed by the application of a dam. The well region is then filled with an insulating encapsulant material to a predetermined level. In this device, plated through holes interconnect layers in a ball grid array.
U.S. Pat. No. 5,519,936 and U.S. Pat. No. 5,561,323 each disclose an electronic package which includes a rigid support member, e.g., copper sheet, to which is bonded both the package's semiconductor chip and circuitized substrate members. The chip is bonded using a thermally conductive adhesive while the circuitized substrate, preferably a flexible circuit, is bonded using an electrically insulative adhesive. The chip is electrically coupled to designated parts of the circuitry of the substrate, preferably by wire, thermocompression or thermosonic bonding. An encapsulant may be used to cover and protect the connections between the chip and substrate. This package may in turn be electrically coupled to a separate second substrate such as a PCB.
U.S. Pat. No. 5,435,732 discloses a flexible circuit member including a circuitized substrate of a dielectric material having a plurality of apertures therein. Located within and/or bridging selected ones of the apertures are electrical conductors, the conductors having a solder member secured thereto. A frame is also used, the circuitized substrate being secured thereto. Each of these devices disclose metallized through holes used to interconnect layers on a TBGA.
U.S. Pat. No. 5,585,162 discloses a flexible circuit construction which allows solder balls to be mass reflow attached to the ground plane of a double-sided flexible circuit by providing a first via which is separate from the remainder of the ground plane, but which is electrically connected to the ground plane through a second via at a distance from the first via by a circuit trace on the side of the flexible circuit opposite the ground plane. In this device, metallized through holes or metallized blind vias interconnect layers on the TBGA.
U.S. Pat. No. 5,397,921 and U.S. Pat. No. 5,409,865 disclose a device and a method in which an integrated circuit package, including a TAB tape, a stiffener structure, and solder balls, provide external connection to a semiconductor die connected through electrically conductive traces of the TAB tape. The TAB tape has upper and lower dielectric layers each having an aperture for accommodating the semiconductor die. In addition, the lower dielectric layer is provided with an array of openings which is coincident with an array of electrically conductive pads in the TAB tape, so as to allow the solder balls to attach to the conductive pads. The semiconductor die can be connected to the TAB tape either by inner lead bonding, or by wire bonding. In these devices, solder balls make contact with a stiffener on a TBGA.
U.S. Pat. No. 5,376,588 discloses a surface mount package in which a flexible circuit is laminated on a conductive body. The flexible circuit includes a wiring pattern which is connected to signal bonding pads of an integrated circuit die housed within the package. The flexible circuit may, for example, be a TAB frame or a printed circuit board. Ground bonding pads of the integrated circuit die are coupled to the conductive body via a ground bar or a wire-bondable finish on the conductive body. In this device, a conductive adhesive makes contact with a stiffener on a TBGA.
Therefore, as the speed requirements for computer chips rises above 200 MHz, what is needed is a TBGA package which contains an electrically coupled ground plane to minimize the electrical noise in the system, and which does not require the use of metallized vias.
SUMMARY
One embodiment, accordingly, provides an apparatus and a method for producing a two-metal flex circuit which eliminates the use of metallized vias to interconnect one side of the circuit to the other side thereof. To this end, an electronic package comprises a flexible dielectric layer having a first conductive layer on a first side and a second conductive layer on a second side. A non-conductive passage extends through the dielectric layer from the first side to the second side. The first conductive layer is adjacent an open end of the passage at the first side, and the second conductive layer forms a closed end of the passage at the second side. A solder ball is connected to provide a conductive path between the first conductive layer and the second conductive layer.
A principal advantage of this embodiment is that it provides a very low cost two metal flex circuit. The low cost factor is primarily due to the elimination of metallized vias which interconnect one conductive side of the flex circuit to the other side. Solder balls are used to complete the connection making the necessary contact with the ground plane.
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Larson Donald K.
Schueller Randolph D.
3M Innovative Properties Company
Fonseca Darla P.
Loke Steven
Thai Luan
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