Tap connections for circuits with leakage suppression...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S356000, C257S357000

Reexamination Certificate

active

06388315

ABSTRACT:

BACKGROUND
This invention relates to semiconductors and, more particularly, to semiconductor fabrication.
Semiconductors form the basis of most integrated circuits. Integrated circuits are typically built from standard cell circuits. A standard cell circuit may include an AND gate, a NAND gate, or an inverter, to name just a few.
Each standard cell circuit is typically made up of a number of transistors. An integrated circuit may therefore include hundreds, thousands, or even millions of transistors.
The processes used to manufacture semiconductors employ smaller and smaller line Widths and features which are scaled down in order to increase the number of transistors per die. Furthermore, the power supply levels are collapsed to lower and lower voltages. For deep sub-micron processes, power supply levels may be decreased to keep electrical or electromagnetic fields from punching through the channel region of the transistors. These deep sub-micron processes may be employed, for example, in digital signal processing, or DSP, applications such as cellular technology, to minimize battery discharge levels.
Such deep sub-micron processes, however, leak current while the transistors are off because the threshold voltages for -these devices are lowered. As the leakage current increases, the power consumed (or, more correctly, wasted) by the leaking transistor also increases.
To address the leakage problem, additional voltage supply rails may be added to the integrated circuit design. The supply rails may be used to reverse-bias the bulk-to-source junction of the transistor, for example. However, the additional power rails may present other challenges for the design of the integrated circuit.
Thus, there is a continuing need for an efficient design of an integrated circuit which includes additional power rails.
SUMMARY
In accordance with one embodiment of the invention, a method includes indicating a location for a power rail to supply a potential, assigning the power rail to a well of a first type, and placing a plurality of connections such that the well of the first type has the first potential.
Advantages and other features of the invention will become apparent from the following description, the drawings, and the claims.


REFERENCES:
patent: 6157070 (2000-12-01), Lin et al.

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