Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
1999-12-15
2002-04-09
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S393000, C438S394000, C361S637000, C361S638000, C361S639000, C307S058000, C307S147000, C307S148000
Reexamination Certificate
active
06368933
ABSTRACT:
BACKGROUND
This invention relates to semiconductors and, more particularly, to semiconductor fabrication.
Semiconductors form the basis of most integrated circuits. Integrated circuits are typically built from standard cell circuits. A standard cell circuit may include an AND gate, a NAND gate, or an inverter, to name just a few.
Each standard cell circuit is typically made up of a number of transistors. An integrated circuit may therefore include hundreds, thousands, or even millions of transistors.
The processes used to manufacture semiconductors employ smaller and smaller line widths and features which are scaled down in order to increase the number of transistors per die. Furthermore, the power supply levels are collapsed to lower and lower voltages. For deep sub-micron processes, power supply levels may be decreased to keep electrical or electromagnetic fields from punching through the channel region of the transistors. These deep sub-micron processes may be employed, for example, in digital signal processing, or DSP, applications such as cellular technology, to minimize battery discharge levels.
Such deep sub-micron processes, however, leak current while the transistors are off because the threshold voltages for these devices are lowered. As the leakage current increases, the power consumed (or, more correctly, wasted) by the leaking transistor also increases.
To address the leakage problem, additional voltage supply rails may be added to the integrated circuit design. The supply rails may be used to reverse-bias the bulk-to-source junction of the transistor, for example. However, the additional power rails may present other challenges for the design of the integrated circuit.
Thus, there is a continuing need for an efficient design of an integrated circuit which includes additional power rails.
SUMMARY
REFERENCES:
patent: 5492856 (1996-02-01), Ikeda et al.
Robert F. Pierret, “Semiconductor Device Fundamentals With Computer-Based Exercises Homework Problems,” pp. 680-681.
Neil H. E. Weste Kamran Eshraghian, “Principles of CMOS VLSI Design, A Systems Perspective,” 2nd Ed., pp. 51, 54-55.
Amrelia Vikas R.
Clark Lawrence T.
Do Tuan X.
Hoffman Eric J.
Soetan Raphael A.
Intel Corporation
Trop, Pruner&Hu, P.C.
Zarneke David A.
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