Tamperproof arrangement for an integrated circuit device

Details Tamperproof arrangement for an integrated circuit device Tamperproof arrangement for an integrated circuit device

1992-05-04

1995-02-14

Ledynh, Bot

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

174 522, 361730, 257687, 257783, 257787, 340521, 340652, 380 3, 380 4, H01L 2302, H01L 2328, G08B 1900, H04L 900

Patent

active

053897382

ABSTRACT:
A tamperproof arrangement for an integrated circuit device. The arrangement includes a package and lid fabricated of heavy metals to prevent X-radiation or infrared detection of circuit operation. Sensors and control circuitry are located on the integrated circuit die itself which detect increased temperature and radiation and clear or zeroize any sensitive information included within the integrated circuit device. Electrode finger grids above and below the integrated circuit die detect physical attempts to penetrate the integrated circuit die. Critical circuit functions are segregated from non-critical functions. Power applied to the integrated circuit device is monitored and separated for critical and non-critical circuit functions.

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patent: 4506344 (1985-03-01), Hubbard
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patent: 4691350 (1987-09-01), Kleijne
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patent: 5032708 (1991-07-01), Comerford et al.
patent: 5117457 (1992-05-01), Cromerford
patent: 5159629 (1992-10-01), Double

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