Tag buffer with testing capability

Excavating

Patent

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Details

371 10, 371 51, 365200, G11C 2900, G01R 3128

Patent

active

047409711

ABSTRACT:
A tag buffer having built-in testing capabilities is disclosed. In a single-chip, integrated-circuit design which includes a SRAM, a parity generator and checker, and a comparator, a method and capability of testing the functionality of the SRAM and parity components is defined. For an embodiment in which the SRAM component includes a redundancy scheme for replacing a defective memory array row, a test for determining whether a redundant row has been used is also provided.

REFERENCES:
patent: 3599146 (1971-08-01), Weisbecker
patent: 3789204 (1974-01-01), Barlow
patent: 3982111 (1976-09-01), Lerner
patent: 4195770 (1980-04-01), Benton
patent: 4319355 (1982-03-01), Mollier
patent: 4417162 (1983-11-01), Keller
patent: 4483003 (1984-11-01), Beal
patent: 4577294 (1986-03-01), Brown
patent: 4601034 (1986-07-01), Sridhar
Texas Instruments Data Sheet, "TMS 2150 JL Cache Address Comparator", Mar. 1982, pp. 106-111.
Fujitsu Data Sheet, "MB78024, 608-Bit Buffer Address Array".

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