Table lookup multiplier employing compressed data read only memo

Details Table lookup multiplier employing compressed data read only memo Table lookup multiplier employing compressed data read only memo

1982-12-21

1986-01-21

Malzahn, David H.

Boots, shoes, and leggings

364756, 364757, 364759, G06F 752

Patent

active

045660751

ABSTRACT:
A multiplier circuit including a read-only memory containing a table of products for digits of a multiplicand and multiplier. The multiplier circuit will produce the product when a multiplicand digit and a multiplier digit are input. The contents of the memory has been reduced such that while the multiplicand and multiplier digits will all produce the proper product, the amount of actual bit information stored in the memory is less than that of the total of bits in the total number of products. Another embodiment of the present invention is disclosed that includes several digits of a multiplier and a single digit of a multiplicand placed into a single memory containing products of these multiplier/multiplicand digits. This memory has been reduced but will simultaneously produce the products of the multiplicand with all input multipliers.

REFERENCES:
patent: 4390961 (1983-06-01), Negi et al.
Brubaker et al., "Multiplication Using Logarithms Implemented with Read-Only Memory", IEEE Trans. on Computers, vol. C-24, No. 8, Aug. 1975, pp. 761-765.
Webster et al., "B.C.D. Multipliers", Computers & Digital Techniques, vol. 2, No. 5, pp. 226-230.
Hemel, "Making Small ROM's do Math Quickly, Cheaply & Easily", Electronics, May 11, 1970, pp. 104-111.
Bywater, "Error Reduction in ROM Multipliers", Electronic Engineering vol. 49, No. 593, Jun. 1977, p. 17.
Maholick, "Fast BCD Multiplication Logic", IBM Tech. Disclosure Bulletin, vol. 20, No. 2, Jul. 1977, pp. 712-715.
Kaiser "Digital Filters for High Speed Data Processing", RCA Advanced Technology Labs, Camden, N.J., Technical Report AFAL-TR-70-204, Sep. 1970, pp. 7-1 thru 7-20.

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